[Qemu-devel] [PATCH 4/8] disas: sparc: QOMify target specific disas setup

[Peter Crosthwaite]

From: Peter Crosthwaite <address@hidden>

Move the target_disas() sparc specifics to the QOM disas_set_info hook
and delete the #ifdef specific code in disas.c.

Cc: Mark Cave-Ayland <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
---
Testing:
$ ./sparc64-softmmu/qemu-system-sparc64 -nographic 2> er -d in_asm -S
QEMU 2.3.90 monitor - type 'help' for more information
(qemu) info registers
pc: 000001fff0000020  npc: 000001fff0000024
...
(qemu) x/i 0x1fff0000020
0x000001fff0000020:  b  0x1fff000c020
(qemu) x/i 0x1fff0000024
0x000001fff0000024:  nop
(qemu) c
(qemu) OpenBIOS for Sparc64
QEMU: Terminated

$ more err
--------------
IN:
0x000001fff0000020:  b  0x1fff000c020
0x000001fff0000024:  nop

$ ./sparc-softmmu/qemu-system-sparc -nographic 2> err -d in_asm -S
QEMU 2.3.90 monitor - type 'help' for more information
(qemu) info registers
pc: 00000000  npc: 00000004
...
(qemu) x/i 0
0x00000000:  b  0x5d48
(qemu) x/i 4
0x00000004:  nop
(qemu) c
(qemu) q

$ more err
--------------
IN:
0x00000000:  b  0x5d48
0x00000004:  nop
---
 disas.c            | 10 ----------
 target-sparc/cpu.c |  9 +++++++++
 2 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/disas.c b/disas.c
index 91cbb1a..9459505 100644
--- a/disas.c
+++ b/disas.c
@@ -222,11 +222,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong 
code,
         s.info.mach = bfd_mach_i386_i386;
     }
     s.info.print_insn = print_insn_i386;
-#elif defined(TARGET_SPARC)
-    s.info.print_insn = print_insn_sparc;
-#ifdef TARGET_SPARC64
-    s.info.mach = bfd_mach_sparc_v9b;
-#endif
 #elif defined(TARGET_PPC)
     if ((flags >> 16) & 1) {
         s.info.endian = BFD_ENDIAN_LITTLE;
@@ -441,11 +436,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu,
     s.info.print_insn = print_insn_i386;
 #elif defined(TARGET_ALPHA)
     s.info.print_insn = print_insn_alpha;
-#elif defined(TARGET_SPARC)
-    s.info.print_insn = print_insn_sparc;
-#ifdef TARGET_SPARC64
-    s.info.mach = bfd_mach_sparc_v9b;
-#endif
 #elif defined(TARGET_PPC)
     if (flags & 0xFFFF) {
         /* If we have a precise definition of the instruction set, use it. */
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 9528e3a..06c59a4 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -90,6 +90,14 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int 
interrupt_request)
     return false;
 }
 
+static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info)
+{
+    info->print_insn = print_insn_sparc;
+#ifdef TARGET_SPARC64
+    info->mach = bfd_mach_sparc_v9b;
+#endif
+}
+
 static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
 {
     CPUClass *cc = CPU_GET_CLASS(cpu);
@@ -854,6 +862,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void 
*data)
 #else
     cc->gdb_num_core_regs = 72;
 #endif
+    cc->disas_set_info = cpu_sparc_disas_set_info;
 }
 
 static const TypeInfo sparc_cpu_type_info = {
-- 
1.9.1