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Re: [Qemu-devel] [PATCH for-2.4 1/2] target-mips: fix page fault address
From: |
Leon Alrae |
Subject: |
Re: [Qemu-devel] [PATCH for-2.4 1/2] target-mips: fix page fault address for LWL/LWR/LDL/LDR |
Date: |
Wed, 15 Jul 2015 17:30:10 +0100 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 14/07/2015 16:45, Aurelien Jarno wrote:
> When a LWL, LWR, LDL or LDR instruction triggers a page fault, QEMU
> currently reports the aligned address in CP0 BadVAddr, while the Windows
> NT kernel expects the unaligned address.
>
> This patch adds a byte access with the unaligned address at the
> beginning of the LWL/LWR/LDL/LDR instructions to possibly trigger a page
> fault and fill the QEMU TLB.
>
> Cc: Leon Alrae <address@hidden>
> Reported-by: Hervé Poussineau <address@hidden>
> Tested-by: Hervé Poussineau <address@hidden>
> Signed-off-by: Aurelien Jarno <address@hidden>
> ---
> target-mips/translate.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
Thanks, applied to mips-next.
Leon