Re: [Qemu-devel] [PATCH v2] target-mips: simplify LWL/LDL mask generation

[Richard Henderson]

On 07/15/2015 08:05 AM, Aurelien Jarno wrote:
> The LWL/LDL instructions mask the GPR with a mask depending on the
> address alignement. It is currently computed by doing:
> 
>     mask = 0x7fffffffffffffffull >> (t1 ^ 63)
> 
> It's simpler to generate it by doing:
> 
>     mask = ~(-1 << t1)
> 
> It uses one TCG instruction less, and it avoids a 32/64-bit constant
> loading which can take a few instructions on RISC hosts.
> 
> Cc: Leon Alrae <address@hidden>
> Signed-off-by: Aurelien Jarno <address@hidden>
> ---
>  target-mips/translate.c | 14 ++++++--------
>  1 file changed, 6 insertions(+), 8 deletions(-)
> 
> Changes v1 -> v2:
> - Use ~(-1 << t1) instead of (1 << t1) - 1 as suggested by Paolo
>   Bonzini.

Reviewed-by: Richard Henderson <address@hidden>


r~