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Re: [Qemu-devel] [PATCH 2/3] hw/arm/gic: Kill code duplication


From: Pavel Fedin
Subject: Re: [Qemu-devel] [PATCH 2/3] hw/arm/gic: Kill code duplication
Date: Wed, 05 Aug 2015 09:30:27 +0300

 Hello!

> > -    memory_region_init_io(&s->cpuiomem[0], OBJECT(s), &gic_thiscpu_ops, s,
> > -                          "gic_cpu", 0x100);
> 
> This memory region is size 0x100, as the comment says it must be...
> 
> > +    if (s->revision != REV_NVIC) {
> > +        /* CPU interface (NVIC doesn't have this) */
> > +        memory_region_init_io(&s->cpuiomem[0], OBJECT(s), ops ? &ops[1] : 
> > NULL,
> > +                              s, "gic_cpu", 0x1000);
> 
> ...but here it is 0x1000.
> 
> The a9mpcore container component creates a layout where there are
> other things immediately after the 0x100 region, so we can't
> make it bigger for GICv1.

 I have checked the code, We have "revision" property, and for a9mpcore it 
appears to be set to 1 (default). So will it be OK if i rely on revision here ? 
I mean: "s->revision == 2 ? 0x1000 : 0x100". Revision == 2 is also used by 
ZynqMP model, which seems to have a9 CPU (according to some 'a9' names in the 
code), but its memory layout actually can accommodate this, they say that 
single region is 4K.
 All models that use KVM set revision to 2 and therefore expect full-sized 
region.

Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia




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