Re: [Qemu-devel] [RFC v4 1/9] exec.c: Add new exclusive bitmap to ram_list

[alvise rigo]

On Tue, Aug 11, 2015 at 4:24 PM, Peter Maydell <address@hidden> wrote:
> On 11 August 2015 at 14:52, Paolo Bonzini <address@hidden> wrote:
>>
>> I don't think real hardware has ll/sc per CPU.
>
> On ARM, the exclusives are handled by the 'global monitor', which
> supports tracking an exclusive access per CPU.
>
>>  Can we have the bitmap as:
>>
>> - 0 if one or more CPUs have the address set to exclusive, _and_ no CPU
>> has done a concurrent access
>>
>> - 1 if no CPUs have the address set to exclusive, _or_ one CPU has done
>> a concurrent access.
>>
>> Then:
>>
>> - ll sets the bit to 0, and requests a flush if it was 1
>>
>> - when setting a TLB entry, set it to TLB_EXCL if the bitmap has 0
>>
>> - in the TLB_EXCL slow path, set the bit to 1 and, for conditional
>> stores, succeed if the bit was 0
>>
>> - when removing an exclusive entry, set the bit to 1
>
> This doesn't sound like it has the correct semantics for ARM:
> wouldn't it mean that CPU 1 could do an LL, and then CPU 2
> could do an SC and have it succeed even if it hadn't
> previously done an LL itself?

This case is correctly handled now. If the CPU 2 has not previously
done a LL, the SC will fail, without even entering the helper.
I think Paolo omitted this case in the list.

Regards,
alvise

>
> thanks
> -- PMM