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Re: [Qemu-devel] [PATCH for-2.5 18/30] m68k: addq/subq can work with all


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH for-2.5 18/30] m68k: addq/subq can work with all the data sizes.
Date: Wed, 12 Aug 2015 09:48:58 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0

On 08/09/2015 01:13 PM, Laurent Vivier wrote:
> Improve TCG constant use by creating only once for several uses.
> 
> Signed-off-by: Laurent Vivier <address@hidden>
> ---
>  target-m68k/translate.c | 46 +++++++++++++++++++++++++++-------------------
>  1 file changed, 27 insertions(+), 19 deletions(-)
> 
> diff --git a/target-m68k/translate.c b/target-m68k/translate.c
> index 9e379b3..ae57792 100644
> --- a/target-m68k/translate.c
> +++ b/target-m68k/translate.c
> @@ -1778,40 +1778,48 @@ DISAS_INSN(jump)
>  
>  DISAS_INSN(addsubq)
>  {
> -    TCGv src1;
> -    TCGv src2;
> +    TCGv src;
>      TCGv dest;
> -    int val;
> +    TCGv val;
> +    int imm;
>      TCGv addr;
> +    int opsize;
>  
> -    SRC_EA(env, src1, OS_LONG, 0, &addr);
> -    val = (insn >> 9) & 7;
> -    if (val == 0)
> -        val = 8;
> +    if ((insn & 070) == 010) {
> +        /* Operation on address register is always long.  */
> +        opsize = OS_LONG;
> +    } else {
> +        opsize = insn_opsize(insn, 6);
> +    }
> +    SRC_EA(env, src, opsize, -1, &addr);
> +    imm = (insn >> 9) & 7;
> +    if (imm == 0) {
> +        imm = 8;
> +    }
> +    val = tcg_const_i32(imm);
>      dest = tcg_temp_new();
> -    tcg_gen_mov_i32(dest, src1);
> +    tcg_gen_mov_i32(dest, src);
>      if ((insn & 0x38) == 0x08) {
>          /* Don't update condition codes if the destination is an
>             address register.  */
>          if (insn & 0x0100) {
> -            tcg_gen_subi_i32(dest, dest, val);
> +            tcg_gen_sub_i32(dest, dest, val);
>          } else {
> -            tcg_gen_addi_i32(dest, dest, val);
> +            tcg_gen_add_i32(dest, dest, val);
>          }
>      } else {
> -        src2 = tcg_const_i32(val);
>          if (insn & 0x0100) {
> -            SET_X_FLAG(OS_LONG, dest, tcg_const_i32(val));
> -            tcg_gen_subi_i32(dest, dest, val);
> -            set_cc_op(s, CC_OP_SUB);
> +            SET_X_FLAG(opsize, dest, val);
> +            tcg_gen_sub_i32(dest, dest, val);
> +            SET_CC_OP(opsize, SUB);
>          } else {
> -            tcg_gen_addi_i32(dest, dest, val);
> -            SET_X_FLAG(OS_LONG, dest, tcg_const_i32(val));
> -            SET_CC_OP(OS_LONG, ADD);
> +            tcg_gen_add_i32(dest, dest, val);
> +            SET_X_FLAG(opsize, dest, val);
> +            SET_CC_OP(opsize, ADD);
>          }
> -        gen_update_cc_add(dest, src2);
> +        gen_update_cc_add(dest, val);
>      }

You do need to free val here.

> -    DEST_EA(env, insn, OS_LONG, dest, &addr);
> +    DEST_EA(env, insn, opsize, dest, &addr);
>  }
>  
>  DISAS_INSN(tpf)
> 




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