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[Qemu-devel] [PULL 06/27] hw/arm/virt: Replace magic IRQ constants with
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/27] hw/arm/virt: Replace magic IRQ constants with macros |
Date: |
Thu, 13 Aug 2015 11:44:26 +0100 |
From: "Edgar E. Iglesias" <address@hidden>
Replace magic constants with macros from
hw/arm/virt.h and hw/intc/arm_gic_common.h.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/virt.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 4846892..42efad1 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -48,6 +48,7 @@
#include "hw/arm/sysbus-fdt.h"
#include "hw/platform-bus.h"
#include "hw/arm/fdt.h"
+#include "hw/intc/arm_gic_common.h"
/* Number of external interrupt lines to configure the GIC with */
#define NUM_IRQS 256
@@ -390,15 +391,17 @@ static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic)
*/
for (i = 0; i < smp_cpus; i++) {
DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
- int ppibase = NUM_IRQS + i * 32;
+ int ppibase = NUM_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS;
/* physical timer; we wire it up to the non-secure timer's ID,
* since a real A15 always has TrustZone but QEMU doesn't.
*/
qdev_connect_gpio_out(cpudev, 0,
- qdev_get_gpio_in(gicdev, ppibase + 30));
+ qdev_get_gpio_in(gicdev,
+ ppibase + ARCH_TIMER_NS_EL1_IRQ));
/* virtual timer */
qdev_connect_gpio_out(cpudev, 1,
- qdev_get_gpio_in(gicdev, ppibase + 27));
+ qdev_get_gpio_in(gicdev,
+ ppibase + ARCH_TIMER_VIRT_IRQ));
sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev,
ARM_CPU_IRQ));
sysbus_connect_irq(gicbusdev, i + smp_cpus,
--
1.9.1
- [Qemu-devel] [PULL 01/27] target-arm: Add CNTVOFF_EL2, (continued)
- [Qemu-devel] [PULL 01/27] target-arm: Add CNTVOFF_EL2, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 16/27] i.MX: Fix Coding style for EPIT emulator, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 22/27] target-arm: Add debug check for mismatched cpreg resets, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 23/27] target-arm: Add the AArch64 view of the Secure physical timer, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 12/27] i.MX: Fix Coding style for AVIC emulator., Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 15/27] i.MX: Split EPIT emulator in a header file and a source file, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 17/27] i.MX: Split GPT emulator in a header file and a source file, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 24/27] target-arm: Add AArch32 banked register access to secure physical timer, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 10/27] i.MX:Fix Coding style for UART emulator., Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 20/27] hw/arm/gic: Kill code duplication, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 06/27] hw/arm/virt: Replace magic IRQ constants with macros,
Peter Maydell <=
- [Qemu-devel] [PULL 19/27] Merge memory_region_init_reservation() into memory_region_init_io(), Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 02/27] target-arm: Add CNTHCTL_EL2, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 14/27] i.MX: Fix Coding style for CCM emulator, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 27/27] i.MX: Fix UART driver to work with unitialized "chardev" device, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 07/27] hw/arm/virt: Connect the Hypervisor timer, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 11/27] i.MX: Split AVIC emulator in a header file and a source file, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 03/27] target-arm: Rename and move gt_cnt_reset, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 13/27] i.MX: Split CCM emulator in a header file and a source file, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 08/27] i.MX: Split UART emulator in a header file and a source file, Peter Maydell, 2015/08/13
- [Qemu-devel] [PULL 05/27] target-arm: Add the Hypervisor timer, Peter Maydell, 2015/08/13