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[Qemu-devel] [PATCH 2/9] target-arm: Improve semihosting debug prints
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 2/9] target-arm: Improve semihosting debug prints |
Date: |
Thu, 13 Aug 2015 17:35:38 +0100 |
From: Christopher Covington <address@hidden>
Print semihosting debugging information before the
do_arm_semihosting() call so that angel_SWIreason_ReportException,
which causes the function to not return, gets the same debug prints as
other semihosting calls. Also print out the semihosting call number.
Signed-off-by: Christopher Covington <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 01f0d0d..9e0ca49 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -4561,8 +4561,10 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
nr = arm_lduw_code(env, env->regs[15], env->bswap_code) & 0xff;
if (nr == 0xab) {
env->regs[15] += 2;
+ qemu_log_mask(CPU_LOG_INT,
+ "...handling as semihosting call 0x%x\n",
+ env->regs[0]);
env->regs[0] = do_arm_semihosting(env);
- qemu_log_mask(CPU_LOG_INT, "...handled as semihosting call\n");
return;
}
}
@@ -4882,8 +4884,10 @@ void arm_cpu_do_interrupt(CPUState *cs)
if (((mask == 0x123456 && !env->thumb)
|| (mask == 0xab && env->thumb))
&& (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) {
+ qemu_log_mask(CPU_LOG_INT,
+ "...handling as semihosting call 0x%x\n",
+ env->regs[0]);
env->regs[0] = do_arm_semihosting(env);
- qemu_log_mask(CPU_LOG_INT, "...handled as semihosting call\n");
return;
}
}
@@ -4900,8 +4904,10 @@ void arm_cpu_do_interrupt(CPUState *cs)
if (mask == 0xab
&& (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) {
env->regs[15] += 2;
+ qemu_log_mask(CPU_LOG_INT,
+ "...handling as semihosting call 0x%x\n",
+ env->regs[0]);
env->regs[0] = do_arm_semihosting(env);
- qemu_log_mask(CPU_LOG_INT, "...handled as semihosting call\n");
return;
}
}
--
1.9.1
- [Qemu-devel] [PATCH 0/9] target-arm: Implement A64 semihosting, Peter Maydell, 2015/08/13
- [Qemu-devel] [PATCH 2/9] target-arm: Improve semihosting debug prints,
Peter Maydell <=
- [Qemu-devel] [PATCH 5/9] include/exec/softmmu-semi.h: Add support for 64-bit values, Peter Maydell, 2015/08/13
- [Qemu-devel] [PATCH 8/9] target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block, Peter Maydell, 2015/08/13
- [Qemu-devel] [PATCH 9/9] target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction, Peter Maydell, 2015/08/13
- [Qemu-devel] [PATCH 6/9] target-arm/arm-semi.c: Support widening APIs to 64 bits, Peter Maydell, 2015/08/13
- [Qemu-devel] [PATCH 3/9] gdbstub: Implement gdb_do_syscallv(), Peter Maydell, 2015/08/13
- [Qemu-devel] [PATCH 1/9] target-arm/arm-semi.c: Fix broken SYS_WRITE0 via gdb, Peter Maydell, 2015/08/13
- [Qemu-devel] [PATCH 7/9] target-arm/arm-semi.c: Implement A64 specific SyncCacheRange call, Peter Maydell, 2015/08/13