Re: [Qemu-devel] [PATCH for-2.5] piix: Document coreboot-specific RAM size config register

[Eduardo Habkost]

On Thu, Aug 13, 2015 at 11:30:57AM -0400, Richard Smith wrote:
> On 08/09/2015 09:48 PM, Ed Swierk wrote:
> 
> 
> >References to coreboot commits: * Original commit adding code reading
> >register offsets 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x56, 0x57 to
> >Intel 440bx code in coreboot:
> >cb8eab482ff09ec256456312ef2d6e7710123551
> 
> I have vague recollection I may have been responsible for this but it
> was so long ago.  I'm having trouble finding the commits in gitweb.
> When I put those hashes into the commit search at
> review.coreboot.org I get not found.

Those are git commits from the repository at
http://review.coreboot.org/coreboot.git

(I couldn't check if they can be seen in a browser, right now, because
the server is returning HTTP 502 errors)

-- 
Eduardo