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[Qemu-devel] [RFC 18/38] tcg: add fences
From: |
Emilio G. Cota |
Subject: |
[Qemu-devel] [RFC 18/38] tcg: add fences |
Date: |
Sun, 23 Aug 2015 20:23:47 -0400 |
Signed-off-by: Emilio G. Cota <address@hidden>
---
tcg/tcg-op.c | 5 +++++
tcg/tcg-op.h | 18 ++++++++++++++++++
tcg/tcg-opc.h | 5 +++++
3 files changed, 28 insertions(+)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 45098c3..6d5b1df 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -57,6 +57,11 @@ static void tcg_emit_op(TCGContext *ctx, TCGOpcode opc, int
args)
};
}
+void tcg_gen_op0(TCGContext *ctx, TCGOpcode opc)
+{
+ tcg_emit_op(ctx, opc, -1);
+}
+
void tcg_gen_op1(TCGContext *ctx, TCGOpcode opc, TCGArg a1)
{
int pi = ctx->gen_next_parm_idx;
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index d1d763f..52482c0 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -28,6 +28,7 @@
/* Basic output routines. Not for general consumption. */
+void tcg_gen_op0(TCGContext *, TCGOpcode);
void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg);
void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg);
void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg);
@@ -698,6 +699,23 @@ static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret,
TCGv_i64 arg)
tcg_gen_trunc_shr_i64_i32(ret, arg, 0);
}
+/* fences */
+
+static inline void tcg_gen_fence_load(void)
+{
+ tcg_gen_op0(&tcg_ctx, INDEX_op_fence_load);
+}
+
+static inline void tcg_gen_fence_store(void)
+{
+ tcg_gen_op0(&tcg_ctx, INDEX_op_fence_store);
+}
+
+static inline void tcg_gen_fence_full(void)
+{
+ tcg_gen_op0(&tcg_ctx, INDEX_op_fence_full);
+}
+
/* QEMU specific operations. */
#ifndef TARGET_LONG_BITS
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
index 13ccb60..85de953 100644
--- a/tcg/tcg-opc.h
+++ b/tcg/tcg-opc.h
@@ -167,6 +167,11 @@ DEF(muls2_i64, 2, 2, 0, IMPL64 |
IMPL(TCG_TARGET_HAS_muls2_i64))
DEF(muluh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i64))
DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64))
+/* fences */
+DEF(fence_load, 0, 0, 0, 0)
+DEF(fence_store, 0, 0, 0, 0)
+DEF(fence_full, 0, 0, 0, 0)
+
/* QEMU specific */
#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
DEF(debug_insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT)
--
1.9.1
[Qemu-devel] [RFC 04/38] translate-all: remove volatile from have_tb_lock, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 06/38] seqlock: add missing 'inline' to seqlock_read_retry, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 02/38] hw/i386/kvmvapic: add missing include of tcg.h, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 01/38] cpu-exec: add missing mmap_lock in tb_find_slow, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 10/38] translate-all: remove obsolete comment about l1_map, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 18/38] tcg: add fences,
Emilio G. Cota <=
[Qemu-devel] [RFC 12/38] linux-user: call rcu_(un)register_thread on pthread_(exit|create), Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 05/38] thread-posix: inline qemu_spin functions, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 11/38] qemu-thread: handle spurious futex_wait wakeups, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 13/38] cputlb: add physical address to CPUTLBEntry, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 14/38] softmmu: add helpers to get ld/st physical addresses, Emilio G. Cota, 2015/08/23