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Re: [Qemu-devel] [RFC 14/38] softmmu: add helpers to get ld/st physical
From: |
Emilio G. Cota |
Subject: |
Re: [Qemu-devel] [RFC 14/38] softmmu: add helpers to get ld/st physical addresses |
Date: |
Mon, 24 Aug 2015 22:47:19 -0400 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Sun, Aug 23, 2015 at 19:02:30 -0700, Paolo Bonzini wrote:
> On 23/08/2015 17:23, Emilio G. Cota wrote:
> > This will be used by the atomic instruction emulation code.
>
> Is this a fast path? If not, we can use the existing addend field and
> convert the host address to a ram_addr_t easily.
On x86 this is a fast path because the helper that goes before every
store (aie_st_pre, p.17/38) checks whether any atomic operations on
the store's cache line have been done before. The check is done using
a bitmap (p.16/38); the input to the bitmap is the physical address with
the last 6 bits shifted out (I'm assuming 2**6=64-byte cache lines).
That said: How would the conversion via the addend field look like?
If it's just an addition it might be cheap enough--and we wouldn't
bloat CPUTLBEntry.
Thanks,
Emilio
- Re: [Qemu-devel] [RFC 12/38] linux-user: call rcu_(un)register_thread on pthread_(exit|create), (continued)
[Qemu-devel] [RFC 11/38] qemu-thread: handle spurious futex_wait wakeups, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 13/38] cputlb: add physical address to CPUTLBEntry, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 14/38] softmmu: add helpers to get ld/st physical addresses, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 17/38] aie: add target helpers, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 15/38] radix-tree: add generic lockless radix tree module, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 16/38] aie: add module for Atomic Instruction Emulation, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 20/38] tcg/i386: implement fences, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 29/38] tcg: export have_tb_lock, Emilio G. Cota, 2015/08/23
[Qemu-devel] [RFC 25/38] cpu: add barriers around cpu->tcg_exit_req, Emilio G. Cota, 2015/08/23