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[Qemu-devel] [PULL 02/20] MAINTAINERS: Update Xilinx Maintainership
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 02/20] MAINTAINERS: Update Xilinx Maintainership |
Date: |
Tue, 25 Aug 2015 15:59:58 +0100 |
From: Alistair Francis <address@hidden>
Peter C is leaving Xilinx, so update the maintainer list
to point to Alistair and Edgar from Xilinx and Peter's
personal email address.
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
MAINTAINERS | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index a059d5d..d0268f9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -349,7 +349,8 @@ S: Maintained
F: hw/*/versatile*
Xilinx Zynq
-M: Peter Crosthwaite <address@hidden>
+M: Alistair Francis <address@hidden>
+M: Peter Crosthwaite <address@hidden>
S: Maintained
F: hw/arm/xilinx_zynq.c
F: hw/misc/zynq_slcr.c
@@ -405,7 +406,7 @@ S: Maintained
F: hw/microblaze/petalogix_s3adsp1800_mmu.c
petalogix_ml605
-M: Peter Crosthwaite <address@hidden>
+M: Edgar E. Iglesias <address@hidden>
S: Maintained
F: hw/microblaze/petalogix_ml605_mmu.c
@@ -685,10 +686,17 @@ S: Orphan
F: hw/scsi/lsi53c895a.c
SSI
-M: Peter Crosthwaite <address@hidden>
+M: Peter Crosthwaite <address@hidden>
S: Maintained
F: hw/ssi/*
F: hw/block/m25p80.c
+X: hw/ssi/xilinx_*
+
+Xilinx SPI
+M: Alistair Francis <address@hidden>
+M: Peter Crosthwaite <address@hidden>
+S: Maintained
+F: hw/ssi/xilinx_*
USB
M: Gerd Hoffmann <address@hidden>
@@ -777,8 +785,9 @@ F: hw/scsi/megasas.c
F: hw/scsi/mfi.h
Xilinx EDK
-M: Peter Crosthwaite <address@hidden>
M: Edgar E. Iglesias <address@hidden>
+M: Alistair Francis <address@hidden>
+M: Peter Crosthwaite <address@hidden>
S: Maintained
F: hw/*/xilinx_*
F: include/hw/xilinx.h
@@ -880,7 +889,7 @@ F: include/hw/cpu/icc_bus.h
F: hw/cpu/icc_bus.c
Device Tree
-M: Peter Crosthwaite <address@hidden>
+M: Peter Crosthwaite <address@hidden>
M: Alexander Graf <address@hidden>
S: Maintained
F: device_tree.[ch]
--
1.9.1
- [Qemu-devel] [PULL 04/20] target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers, (continued)
- [Qemu-devel] [PULL 04/20] target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 11/20] target-arm: Enable the AArch32 ATS12NSO ops, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 12/20] target-arm: Implement AArch32 ATS1H* operations, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 01/20] xlnx-zynqmp: Connect the four OCM banks, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 17/20] target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touch, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 03/20] MAINTAINERS: Add ZynqMP to MAINTAINERS file, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 16/20] target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric order, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 13/20] smbios: add smbios 3.0 support, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 14/20] smbios: implement smbios support for mach-virt, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 08/20] target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations, Peter Maydell, 2015/08/25
- [Qemu-devel] [PULL 02/20] MAINTAINERS: Update Xilinx Maintainership,
Peter Maydell <=
- [Qemu-devel] [PULL 15/20] cputlb: Add functions for flushing TLB for a single MMU index, Peter Maydell, 2015/08/25