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Re: [Qemu-devel] [PATCH v14 26/33] target-tilegx: Handle scalar multiply
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v14 26/33] target-tilegx: Handle scalar multiply instructions |
Date: |
Sun, 30 Aug 2015 14:46:46 +0100 |
On 24 August 2015 at 17:17, Richard Henderson <address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target-tilegx/translate.c | 112
> ++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 112 insertions(+)
It seems a shame that these are all 32x32->64 multiplies
(or in some cases 32x32->32), but we won't actually be able
to make use of a host CPU 32x32->64 instruction.
Still, these give the right results I think so
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v14 23/33] target-tilegx: Handle bitfield instructions, (continued)
- [Qemu-devel] [PATCH v14 18/33] target-tilegx: Handle post-increment load and store instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 21/33] target-tilegx: Handle comparison instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 24/33] target-tilegx: Handle shift instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 25/33] target-tilegx: Handle conditional move instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 26/33] target-tilegx: Handle scalar multiply instructions, Richard Henderson, 2015/08/24
- Re: [Qemu-devel] [PATCH v14 26/33] target-tilegx: Handle scalar multiply instructions,
Peter Maydell <=
- [Qemu-devel] [PATCH v14 27/33] target-tilegx: Handle mask instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 28/33] target-tilegx: Handle v1cmpeq, v1cmpne, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 29/33] target-tilegx: Handle mtspr, mfspr, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 31/33] target-tilegx: Handle v4int_l/h, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 30/33] target-tilegx: Handle atomic instructions, Richard Henderson, 2015/08/24