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Re: [Qemu-devel] [PATCH v14 28/33] target-tilegx: Handle v1cmpeq, v1cmpn
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v14 28/33] target-tilegx: Handle v1cmpeq, v1cmpne |
Date: |
Sun, 30 Aug 2015 16:11:59 +0100 |
On 24 August 2015 at 17:17, Richard Henderson <address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target-tilegx/translate.c | 51
> +++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 51 insertions(+)
>
> diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
> index af4b34a..1224a8e 100644
> --- a/target-tilegx/translate.c
> +++ b/target-tilegx/translate.c
> @@ -93,6 +93,8 @@ typedef struct {
> #define OE_IM(E,XY) OE(IMM8_OPCODE_##XY, E##_IMM8_OPCODE_##XY, XY)
> #define OE_SH(E,XY) OE(SHIFT_OPCODE_##XY, E##_SHIFT_OPCODE_##XY, XY)
>
> +#define V1_IMM(X) (((X) & 0xff) * 0x0101010101010101ull)
> +
>
> static void gen_exception(DisasContext *dc, TileExcp num)
> {
> @@ -238,6 +240,41 @@ static void gen_mul_half(TCGv tdest, TCGv tsrca, TCGv
> tsrcb, int ha, int hb)
> tcg_temp_free(t);
> }
>
> +/* Equality comparison with zero can be done quickly and efficiently. */
> +static void gen_v1cmpeq0(TCGv v)
> +{
> + TCGv m = tcg_const_tl(V1_IMM(0x7f));
> + TCGv c = tcg_temp_new();
> +
> + /* ~(((a & m) + m) | m | a). Sets the msb for each byte == 0. */
> + tcg_gen_and_tl(c, v, m);
> + tcg_gen_add_tl(c, c, m);
> + tcg_gen_or_tl(c, c, m);
> + tcg_gen_nor_tl(c, c, v);
> + tcg_temp_free(m);
It would be nice to be consistent with whether we're using 'v'
or 'a' for the input value in the code and the comment.
otherwise
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v14 21/33] target-tilegx: Handle comparison instructions, (continued)
- [Qemu-devel] [PATCH v14 24/33] target-tilegx: Handle shift instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 25/33] target-tilegx: Handle conditional move instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 26/33] target-tilegx: Handle scalar multiply instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 27/33] target-tilegx: Handle mask instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 28/33] target-tilegx: Handle v1cmpeq, v1cmpne, Richard Henderson, 2015/08/24
- Re: [Qemu-devel] [PATCH v14 28/33] target-tilegx: Handle v1cmpeq, v1cmpne,
Peter Maydell <=
- [Qemu-devel] [PATCH v14 29/33] target-tilegx: Handle mtspr, mfspr, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 31/33] target-tilegx: Handle v4int_l/h, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 30/33] target-tilegx: Handle atomic instructions, Richard Henderson, 2015/08/24