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Re: [Qemu-devel] [PULL 00/10] target-mips queue


From: Peter Maydell
Subject: Re: [Qemu-devel] [PULL 00/10] target-mips queue
Date: Fri, 18 Sep 2015 14:42:25 +0100

On 18 September 2015 at 12:25, Leon Alrae <address@hidden> wrote:
> Hi,
>
> This pull request contains various fixes, improvements and clean-ups.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <address@hidden>
> Cc: Aurelien Jarno <address@hidden>
>
> The following changes since commit 16a1b6e97c2a2919fd296db4bea2f9da2ad3cc4d:
>
>   target-cris: update CPU state save/load to use VMStateDescription 
> (2015-09-17 14:31:38 +0100)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20150918
>
> for you to fetch changes up to 9c708c7f9fbb813a3fac02f2728e51e62f2f5ffc:
>
>   target-mips: improve exception handling (2015-09-18 12:07:24 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2015-09-18
>
> Changes:
> * fixes for rdhwr, tlbwr, mtc0, recip.fmt, rsqrt.fmt and daui instructions
> * removal of MIPS_DEBUG code
> * use tcg_gen_extrh_i64_i32()
> * improve random tlb index generation in cpu_mips_get_random()
> * exception handling improvements to correctly restore icount
>
> ----------------------------------------------------------------

Applied, thanks.

-- PMM



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