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[Qemu-devel] [PATCH RFC 4/8] target-arm: Avoid inline for get_phys_addr
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH RFC 4/8] target-arm: Avoid inline for get_phys_addr |
Date: |
Sat, 19 Sep 2015 07:15:23 -0700 |
From: "Edgar E. Iglesias" <address@hidden>
Avoid inline for get_phys_addr() to prepare for future recursive use.
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target-arm/helper.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 6f0ed51..7e7f29d 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -13,7 +13,7 @@
#include "exec/semihost.h"
#ifndef CONFIG_USER_ONLY
-static inline bool get_phys_addr(CPUARMState *env, target_ulong address,
+static bool get_phys_addr(CPUARMState *env, target_ulong address,
int access_type, ARMMMUIdx mmu_idx,
hwaddr *phys_ptr, MemTxAttrs *attrs, int
*prot,
target_ulong *page_size, uint32_t *fsr);
@@ -6967,10 +6967,10 @@ static bool get_phys_addr_pmsav5(CPUARMState *env,
uint32_t address,
* @page_size: set to the size of the page containing phys_ptr
* @fsr: set to the DFSR/IFSR value on failure
*/
-static inline bool get_phys_addr(CPUARMState *env, target_ulong address,
- int access_type, ARMMMUIdx mmu_idx,
- hwaddr *phys_ptr, MemTxAttrs *attrs, int
*prot,
- target_ulong *page_size, uint32_t *fsr)
+static bool get_phys_addr(CPUARMState *env, target_ulong address,
+ int access_type, ARMMMUIdx mmu_idx,
+ hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot,
+ target_ulong *page_size, uint32_t *fsr)
{
if (mmu_idx == ARMMMUIdx_S12NSE0 || mmu_idx == ARMMMUIdx_S12NSE1) {
/* TODO: when we support EL2 we should here call ourselves recursively
--
1.9.1
- [Qemu-devel] [PATCH RFC 0/8] arm: Steps towards EL2 support round 5, Edgar E. Iglesias, 2015/09/19
- [Qemu-devel] [PATCH RFC 1/8] target-arm: Add HPFAR_EL2, Edgar E. Iglesias, 2015/09/19
- [Qemu-devel] [PATCH RFC 2/8] target-arm: Add computation of starting level for S2 PTW, Edgar E. Iglesias, 2015/09/19
- [Qemu-devel] [PATCH RFC 3/8] target-arm: Add support for S2 page-table protection bits, Edgar E. Iglesias, 2015/09/19
- [Qemu-devel] [PATCH RFC 4/8] target-arm: Avoid inline for get_phys_addr,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH RFC 5/8] target-arm: Add ARMMMUFaultInfo, Edgar E. Iglesias, 2015/09/19
- [Qemu-devel] [PATCH RFC 6/8] target-arm: Add S2 translation support for S1 PTW, Edgar E. Iglesias, 2015/09/19
- [Qemu-devel] [PATCH RFC 7/8] target-arm: Route S2 MMU faults to EL2, Edgar E. Iglesias, 2015/09/19
- [Qemu-devel] [PATCH RFC 8/8] target-arm: Add support for S1 + S2 MMU translations, Edgar E. Iglesias, 2015/09/19
- Re: [Qemu-devel] [PATCH RFC 0/8] arm: Steps towards EL2 support round 5, Edgar E. Iglesias, 2015/09/19
- Re: [Qemu-devel] [PATCH RFC 0/8] arm: Steps towards EL2 support round 5, Peter Maydell, 2015/09/23