[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 21/48] apic_internal.h: added more constants
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 21/48] apic_internal.h: added more constants |
Date: |
Tue, 22 Sep 2015 17:05:44 +0200 |
From: Pavel Butsykin <address@hidden>
These constants are needed for optimal access to
bit fields local apic registers without magic numbers.
Signed-off-by: Pavel Butsykin <address@hidden>
Signed-off-by: Denis V. Lunev <address@hidden>
CC: Paolo Bonzini <address@hidden>
CC: Andreas Färber <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
include/hw/i386/apic_internal.h | 58 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 188131c..a1db16e 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -50,14 +50,72 @@
#define APIC_TRIGGER_EDGE 0
#define APIC_TRIGGER_LEVEL 1
+#define APIC_VECTOR_MASK 0xff
+#define APIC_DCR_MASK 0xf
+
+#define APIC_LVT_TIMER_SHIFT 17
+#define APIC_LVT_MASKED_SHIFT 16
+#define APIC_LVT_LEVEL_TRIGGER_SHIFT 15
+#define APIC_LVT_REMOTE_IRR_SHIFT 14
+#define APIC_LVT_INT_POLARITY_SHIFT 13
+#define APIC_LVT_DELIV_STS_SHIFT 12
+#define APIC_LVT_DELIV_MOD_SHIFT 8
+
+#define APIC_LVT_TIMER_TSCDEADLINE (2 << APIC_LVT_TIMER_SHIFT)
#define APIC_LVT_TIMER_PERIODIC (1<<17)
#define APIC_LVT_MASKED (1<<16)
#define APIC_LVT_LEVEL_TRIGGER (1<<15)
#define APIC_LVT_REMOTE_IRR (1<<14)
#define APIC_INPUT_POLARITY (1<<13)
#define APIC_SEND_PENDING (1<<12)
+#define APIC_LVT_INT_POLARITY (1 << APIC_LVT_INT_POLARITY_SHIFT)
+#define APIC_LVT_DELIV_STS (1 << APIC_LVT_DELIV_STS_SHIFT)
+#define APIC_LVT_DELIV_MOD (7 << APIC_LVT_DELIV_MOD_SHIFT)
+
+#define APIC_ESR_ILL_ADDRESS_SHIFT 7
+#define APIC_ESR_RECV_ILL_VECT_SHIFT 6
+#define APIC_ESR_SEND_ILL_VECT_SHIFT 5
+#define APIC_ESR_RECV_ACCEPT_SHIFT 3
+#define APIC_ESR_SEND_ACCEPT_SHIFT 2
+#define APIC_ESR_RECV_CHECK_SUM_SHIFT 1
#define APIC_ESR_ILLEGAL_ADDRESS (1 << 7)
+#define APIC_ESR_RECV_ILLEGAL_VECT (1 << APIC_ESR_RECV_ILL_VECT_SHIFT)
+#define APIC_ESR_SEND_ILLEGAL_VECT (1 << APIC_ESR_SEND_ILL_VECT_SHIFT)
+#define APIC_ESR_RECV_ACCEPT (1 << APIC_ESR_RECV_ACCEPT_SHIFT)
+#define APIC_ESR_SEND_ACCEPT (1 << APIC_ESR_SEND_ACCEPT_SHIFT)
+#define APIC_ESR_RECV_CHECK_SUM (1 << APIC_ESR_RECV_CHECK_SUM_SHIFT)
+#define APIC_ESR_SEND_CHECK_SUM 1
+
+#define APIC_ICR_DEST_SHIFT 24
+#define APIC_ICR_DEST_SHORT_SHIFT 18
+#define APIC_ICR_TRIGGER_MOD_SHIFT 15
+#define APIC_ICR_LEVEL_SHIFT 14
+#define APIC_ICR_DELIV_STS_SHIFT 12
+#define APIC_ICR_DEST_MOD_SHIFT 11
+#define APIC_ICR_DELIV_MOD_SHIFT 8
+
+#define APIC_ICR_DEST_SHORT (3 << APIC_ICR_DEST_SHORT_SHIFT)
+#define APIC_ICR_TRIGGER_MOD (1 << APIC_ICR_TRIGGER_MOD_SHIFT)
+#define APIC_ICR_LEVEL (1 << APIC_ICR_LEVEL_SHIFT)
+#define APIC_ICR_DELIV_STS (1 << APIC_ICR_DELIV_STS_SHIFT)
+#define APIC_ICR_DEST_MOD (1 << APIC_ICR_DEST_MOD_SHIFT)
+#define APIC_ICR_DELIV_MOD (7 << APIC_ICR_DELIV_MOD_SHIFT)
+
+#define APIC_PR_CLASS_SHIFT 4
+#define APIC_PR_SUB_CLASS 0xf
+
+#define APIC_LOGDEST_XAPIC_SHIFT 4
+#define APIC_LOGDEST_XAPIC_ID 0xf
+
+#define APIC_LOGDEST_X2APIC_SHIFT 16
+#define APIC_LOGDEST_X2APIC_ID 0xffff
+
+#define APIC_SPURIO_FOCUS_SHIFT 9
+#define APIC_SPURIO_ENABLED_SHIFT 8
+
+#define APIC_SPURIO_FOCUS (1 << APIC_SPURIO_FOCUS_SHIFT)
+#define APIC_SPURIO_ENABLED (1 << APIC_SPURIO_ENABLED_SHIFT)
#define APIC_SV_DIRECTED_IO (1<<12)
#define APIC_SV_ENABLE (1<<8)
--
2.5.0
- [Qemu-devel] [PULL 11/48] MAINTAINERS: Add disassemblers to the various backends, (continued)
- [Qemu-devel] [PULL 11/48] MAINTAINERS: Add disassemblers to the various backends, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 12/48] MAINTAINERS: Add more s390 files, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 15/48] MAINTAINERS: add more devices to the PCI section, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 16/48] MAINTAINERS: add maintainer for character device front-ends, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 13/48] MAINTAINERS: add IPack section, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 17/48] ioapic: coalesce level interrupts, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 14/48] MAINTAINERS: add more devices to the PC section, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 18/48] ioapic: fix contents of arbitration register, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 19/48] apic_internal.h: make some apic_get_* functions externally visible, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 20/48] apic_internal.h: rename ESR_ILLEGAL_ADDRESS to APIC_ESR_ILLEGAL_ADDRESS, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 21/48] apic_internal.h: added more constants,
Paolo Bonzini <=
- [Qemu-devel] [PULL 22/48] apic_internal.h: fix formatting and drop unused consts, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 24/48] hmp: added local apic dump state, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 25/48] ioapic_internal.h: added more constants, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 23/48] monitor: make monitor_fprintf and mon_get_cpu externally visible, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 26/48] hmp: added io apic dump state, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 28/48] linux_user: elfload: Default ELF_MACHINE to ELF_ARCH, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 29/48] linux-user: elfload: Provide default for elf_check_arch, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 27/48] hmp: implemented io apic dump state for TCG, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 30/48] elf_ops: Fix coding style for EM alias case statement, Paolo Bonzini, 2015/09/22
- [Qemu-devel] [PULL 33/48] mb: Remove ELF_MACHINE from cpu.h, Paolo Bonzini, 2015/09/22