Re: [Qemu-devel] [PATCH] target-arm: Implement AArch64 OSLSR_EL1 sysreg dummy

[Alistair Francis]

On Tue, Sep 22, 2015 at 11:35 AM, Davorin Mista
<address@hidden> wrote:
> Define a dummy version of the AArch64 OSLAR_EL1 system register
> which just ignores reads.
> Linux reads from this register during its suspend/resume procedure.
>
> Signed-off-by: Davorin Mista <address@hidden>

Looks good to me

Reviewed-by: Alistair Francis <address@hidden>

Thanks,

Alistair

>
> ---
>  target-arm/helper.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 454d666..8431181 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -3085,6 +3085,10 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
>      { .name = "OSLAR_EL1", .state = ARM_CP_STATE_BOTH,
>        .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 4,
>        .access = PL1_W, .type = ARM_CP_NOP },
> +    /* We define a dummy OSLSR_EL1, because Linux reads from it. */
> +    { .name = "OSLSR_EL1", .state = ARM_CP_STATE_BOTH,
> +      .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 1, .opc2 = 4 ,
> +      .access = PL1_R, .type = ARM_CP_NOP },
>      /* Dummy OSDLR_EL1: 32-bit Linux will read this */
>      { .name = "OSDLR_EL1", .state = ARM_CP_STATE_BOTH,
>        .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 3, .opc2 = 4,
> --
> 2.5.3
>
>