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Re: [Qemu-devel] [PATCH v3 18/25] tcg: Add TCG_MAX_INSNS
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH v3 18/25] tcg: Add TCG_MAX_INSNS |
Date: |
Thu, 24 Sep 2015 22:02:52 +0200 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On 2015-09-22 13:25, Richard Henderson wrote:
> Adjust all translators to respect it.
>
> Reviewed-by: Peter Maydell <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target-alpha/translate.c | 3 +++
> target-arm/translate-a64.c | 3 +++
> target-arm/translate.c | 6 +++++-
> target-cris/translate.c | 3 +++
> target-i386/translate.c | 6 +++++-
> target-lm32/translate.c | 3 +++
> target-m68k/translate.c | 6 +++++-
> target-microblaze/translate.c | 6 +++++-
> target-mips/translate.c | 7 ++++++-
> target-moxie/translate.c | 13 +++++++++++--
> target-openrisc/translate.c | 3 +++
> target-ppc/translate.c | 6 +++++-
> target-s390x/translate.c | 3 +++
> target-sh4/translate.c | 7 ++++++-
> target-sparc/translate.c | 7 ++++++-
> target-tilegx/translate.c | 3 +++
> target-tricore/translate.c | 20 +++++++++++++-------
> target-unicore32/translate.c | 3 +++
> target-xtensa/translate.c | 3 +++
> tcg/tcg.h | 1 +
> 20 files changed, 95 insertions(+), 17 deletions(-)
>
> diff --git a/target-alpha/translate.c b/target-alpha/translate.c
> index c10193e..538e202 100644
> --- a/target-alpha/translate.c
> +++ b/target-alpha/translate.c
> @@ -2903,6 +2903,9 @@ static inline void
> gen_intermediate_code_internal(AlphaCPU *cpu,
> if (max_insns == 0) {
> max_insns = CF_COUNT_MASK;
> }
I guess you can change also change the value to TCG_MAX_INSNS, though I
guess the compiler will realize about that.
> + if (max_insns > TCG_MAX_INSNS) {
> + max_insns = TCG_MAX_INSNS;
> + }
>
> if (in_superpage(&ctx, pc_start)) {
> pc_mask = (1ULL << 41) - 1;
Given we have the same pattern in all targets, I do wonder if it
wouldn't be better to just setup (cflags & CF_COUNT_MASK) to
TCG_MAX_INSNS instead of 0 in translate-all.c when not using icount.
That said your code is correct, so:
Reviewed-by: Aurelien Jarno <address@hidden>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net
- [Qemu-devel] [PATCH v3 13/25] target-sparc: Split out gen_branch_n, (continued)
- [Qemu-devel] [PATCH v3 13/25] target-sparc: Split out gen_branch_n, Richard Henderson, 2015/09/22
- [Qemu-devel] [PATCH v3 16/25] tcg: Merge cpu_gen_code into tb_gen_code, Richard Henderson, 2015/09/22
- [Qemu-devel] [PATCH v3 20/25] tcg: Save insn data and use it in cpu_restore_state_from_tb, Richard Henderson, 2015/09/22
- [Qemu-devel] [PATCH v3 19/25] tcg: Pass data argument to restore_state_to_opc, Richard Henderson, 2015/09/22
- [Qemu-devel] [PATCH v3 22/25] tcg: Remove tcg_gen_code_search_pc, Richard Henderson, 2015/09/22
- [Qemu-devel] [PATCH v3 18/25] tcg: Add TCG_MAX_INSNS, Richard Henderson, 2015/09/22
- Re: [Qemu-devel] [PATCH v3 18/25] tcg: Add TCG_MAX_INSNS,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v3 23/25] tcg: Emit prologue to the beginning of code_gen_buffer, Richard Henderson, 2015/09/22
- [Qemu-devel] [PATCH v3 25/25] tcg: Check for overflow via highwater mark, Richard Henderson, 2015/09/22
- [Qemu-devel] [PATCH v3 24/25] tcg: Allocate a guard page after code_gen_buffer, Richard Henderson, 2015/09/22