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Re: [Qemu-devel] [PATCH pic32 v3 04/16] pic32: add two MIPS processor va
From: |
Leon Alrae |
Subject: |
Re: [Qemu-devel] [PATCH pic32 v3 04/16] pic32: add two MIPS processor variants: M4K and microAptivUP |
Date: |
Fri, 2 Oct 2015 11:37:04 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 |
Hi Serge,
On 06/07/15 07:14, Serge Vakulenko wrote:
> Needed for pic32mx (M4K) and pic32mz (microAptivUP) simulation.
>
> Signed-off-by: Serge Vakulenko <address@hidden>
> ---
> target-mips/translate_init.c | 46
> ++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
This patch looks good, but these new cores have VEIC support enabled so
I think it should go together with patch #3 which actually implements
EIC. These patches don't need to wait until entire series is ready, thus
if you address Aurelien's comment related to introducing CP0Ca_RIPL_mask
in patch #3, then I could cherry-pick these two patches and apply to
target-mips queue.
Thanks,
Leon
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- Re: [Qemu-devel] [PATCH pic32 v3 04/16] pic32: add two MIPS processor variants: M4K and microAptivUP,
Leon Alrae <=