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[Qemu-devel] [PULL 15/19] target-tilegx: Implement v2sh* instructions
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 15/19] target-tilegx: Implement v2sh* instructions |
Date: |
Wed, 7 Oct 2015 20:33:13 +1100 |
From: Chen Gang <address@hidden>
It is just according to v1sh* instructions implementation.
Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target-tilegx/translate.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 6ab66f9..9bb8857 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -1686,11 +1686,27 @@ static TileExcp gen_rri_opcode(DisasContext *dc,
unsigned opext,
break;
case OE_SH(V2SHLI, X0):
case OE_SH(V2SHLI, X1):
+ i2 = imm & 15;
+ i3 = 0xffff >> i2;
+ tcg_gen_andi_tl(tdest, tsrca, V2_IMM(i3));
+ tcg_gen_shli_tl(tdest, tdest, i2);
+ mnemonic = "v2shli";
+ break;
case OE_SH(V2SHRSI, X0):
case OE_SH(V2SHRSI, X1):
+ t0 = tcg_const_tl(imm & 15);
+ gen_helper_v2shrs(tdest, tsrca, t0);
+ tcg_temp_free(t0);
+ mnemonic = "v2shrsi";
+ break;
case OE_SH(V2SHRUI, X0):
case OE_SH(V2SHRUI, X1):
- return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
+ i2 = imm & 15;
+ i3 = (0xffff << i2) & 0xffff;
+ tcg_gen_andi_tl(tdest, tsrca, V2_IMM(i3));
+ tcg_gen_shri_tl(tdest, tdest, i2);
+ mnemonic = "v2shrui";
+ break;
case OE(ADDLI_OPCODE_X0, 0, X0):
case OE(ADDLI_OPCODE_X1, 0, X1):
--
2.4.3
- [Qemu-devel] [PULL 04/19] target-tilegx: Implement v1multu instruction, (continued)
- [Qemu-devel] [PULL 04/19] target-tilegx: Implement v1multu instruction, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 19/19] target-tilegx: Support iret instruction and related special registers, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 07/19] target-tilegx: Implement complex multiply instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 14/19] target-tilegx: Handle nofault prefetch instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 08/19] target-tilegx: Let x1 pipe process bpt instruction only, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 09/19] linux-user/syscall_defs.h: Sync the latest si_code from Linux kernel, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 12/19] target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 01/19] target-tilegx: Tidy simd_helper.c, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 06/19] target-tilegx: Implement table index instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 13/19] target-tilegx: Fix a typo for mnemonic about "ld_add", Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 15/19] target-tilegx: Implement v2sh* instructions,
Richard Henderson <=
- [Qemu-devel] [PULL 16/19] target-tilegx: Implement v?int_* instructions., Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 03/19] target-tilegx: Implement v*add and v*sub instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 05/19] target-tilegx: Implement crc instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 11/19] target-tilegx: Decode ill pseudo-instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 18/19] target-tilegx: Use TILEGX_EXCP_OPCODE_UNKNOWN and TILEGX_EXCP_OPCODE_UNIMPLEMENTED correctly, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 17/19] target-tilegx: Implement v2mults instruction, Richard Henderson, 2015/10/08
- Re: [Qemu-devel] [PULL 00/19] Collected tilegx patches, Peter Maydell, 2015/10/08