Re: [Qemu-devel] [PATCH V1] sdhci: Fix hostctl2 write logic.

[Peter Crosthwaite]

On Tue, Sep 15, 2015 at 3:59 PM, Alistair Francis <address@hidden> wrote:
> On Sun, Sep 13, 2015 at 1:36 PM, Peter Crosthwaite
> <address@hidden> wrote:
>> On Fri, Sep 11, 2015 at 3:30 AM, Sai Pavan Boddu
>> <address@hidden> wrote:
>>> From: Peter Crosthwaite <address@hidden>
>>>
>>> This should be a shifted MASKED_WRITE like all other instances of
>>> non-word aligned registers.
>>>
>>> Signed-off-by: Peter Crosthwaite <address@hidden>
>
> Looks good to me
>
> Reviewed-by: Alistair Francis <address@hidden>
>
> Thanks,
>
> Alistair
>
>>
>>
>> As the sender, this requires your signed-off-by line (in addition to
>> any originals). git commit --amend -s should do it.
>>

Ping!

I think this is blocked by Pavan's missing SoB. Otherwise it should be ok.

Regards,
Peter

>> Your own RB might help as well (I can't do review as author).
>>
>> Regards,
>> Peter
>>
>>> ---
>>>  hw/sd/sdhci.c | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
>>> index 8fd75f7..fd354e3 100644
>>> --- a/hw/sd/sdhci.c
>>> +++ b/hw/sd/sdhci.c
>>> @@ -1059,7 +1059,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t 
>>> val, unsigned size)
>>>              value |= SDHC_CTRL2_SAMPLING_CLKSEL;
>>>          }
>>>          s->acmd12errsts = value;
>>> -        s->hostctl2 = value >> 16;
>>> +        MASKED_WRITE(s->hostctl2, mask >> 16, value >> 16);
>>>          break;
>>>      case SDHC_CLKCON:
>>>          if (!(mask & 0xFF000000)) {
>>> --
>>> 2.1.1
>>>
>>