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Re: [Qemu-devel] [PATCH 3/3] armv7-m: add MPU to cortex-m3 and cortex-m4
From: |
Michael Davidsaver |
Subject: |
Re: [Qemu-devel] [PATCH 3/3] armv7-m: add MPU to cortex-m3 and cortex-m4 |
Date: |
Sun, 11 Oct 2015 23:51:00 -0400 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.8.0 |
On 10/11/2015 11:23 AM, Peter Crosthwaite wrote:
> On Fri, Oct 9, 2015 at 6:28 AM, Michael Davidsaver
> <address@hidden> wrote:
>> The M series MPU is almost the same as the already
>> implemented R series MPU. So use the M series
>> and translate as best we can.
>>
> There is some work on list for this that never got a respin:
>
> https://lists.gnu.org/archive/html/qemu-devel/2015-07/msg01945.html
Well, I totally missed that. I'll have look.
> ...
>> + case 0xd34: /* MMFAR MemManage Fault Address */
>> + return ARM_CPU(current_cpu)->pmsav7_mmfar;
> Why reorder the addresses in the switch?
I was thinking to avoid duplicating the qemu_log_mask() for the
unimplemented registers. I take it that this to you is not the lesser
evil :)
> ... If you run your patch through scripts/checkpatch.pl it will detect
> some of these conventions.
Will do.
> ... More style nits here....
All noted.
> Regards, Peter
Michael