Re: [Qemu-devel] [PATCH RFC V5 9/9] hw/arm: Add virt-v3 machine that uses GIC-500

[Pavel Fedin]

 Hello!

>> The system register implementation belongs in the gic code, not
>> target-arm/. We already have support for devices that say
>> "I have some system registers, please add them to this CPU".

> I don't understand.
> The system registers are defined in ARM Architecture reference Manual.
> It is true that the real implementation is in arm_gicv3_interrupts.c
> But the crn, crm, op0, and op1 of the instructions are in CPU domain.

 Not really. If you take a closer look, you'll see that crn, crm, op1, op2 are 
the same for both ARM64 and ARM32. The only difference is that ARM64 uses op0 = 
3, and ARM32 uses cp = 15. Both of these specifiers can coexist in the 
descriptor table.
 I think Peter wants to tell that you should not insert your register table and 
registration function into target-arm/cpu64.c. This code should go to 
hw/intc/arm_gicv3_cpu_interface.c, add .cp = 15, and - voila - it magically 
works with both ARM32 and ARM64.

Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia