Re: [Qemu-devel] [PATCH RFC V5 9/9] hw/arm: Add virt-v3 machine that uses GIC-500

[Shlomo Pongratz]

On Wednesday, October 21, 2015, Peter Maydell <address@hidden> wrote:
> On 21 October 2015 at 12:33, Shlomo Pongratz <address@hidden> wrote:
> > I assume I can add the system registers to target-arm/cpu.c but I wonder if
> > someone really needs to simulate more than 8 AArch32 CPU(s)
>
> The system register implementation belongs in the gic code, not
> target-arm/. We already have support for devices that say
> "I have some system registers, please add them to this CPU".

I don't understand.

The system registers are defined in ARM Architecture reference Manual.

It is true that the real implementation is in arm_gicv3_interrupts.c

But the crn, crm, op0, and op1 of the instructions are in CPU domain.

 

> The mechanism is the same for system registers for both 32-bit
> and 64-bit, incidentally.

I agree.

 

> thanks
> -- PMM