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[Qemu-devel] [PATCH v2 2/8] i.MX: Standardize i.MX GPIO debug
From: |
Jean-Christophe Dubois |
Subject: |
[Qemu-devel] [PATCH v2 2/8] i.MX: Standardize i.MX GPIO debug |
Date: |
Wed, 21 Oct 2015 23:35:43 +0200 |
The goal is to have debug code always compiled during build.
We standardize all debug output on the following format:
[QOM_TYPE_NAME]reporting_function: debug message
We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output
is following the same format as the above debug.
Signed-off-by: Jean-Christophe Dubois <address@hidden>
---
Changes since v1:
* use HWADDR_PRIx for address formating
* standardize qemu_log_mask on same model.
hw/gpio/imx_gpio.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c
index d56ffcd..06d5cb4 100644
--- a/hw/gpio/imx_gpio.c
+++ b/hw/gpio/imx_gpio.c
@@ -31,7 +31,8 @@ typedef enum IMXGPIOLevel {
#define DPRINTF(fmt, args...) \
do { \
if (DEBUG_IMX_GPIO) { \
- fprintf(stderr, "%s: " fmt , __func__, ##args); \
+ fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX_GPIO, \
+ __func__, ##args); \
} \
} while (0)
@@ -176,19 +177,19 @@ static uint64_t imx_gpio_read(void *opaque, hwaddr
offset, unsigned size)
if (s->has_edge_sel) {
reg_value = s->edge_sel;
} else {
- qemu_log_mask(LOG_GUEST_ERROR, "%s[%s]: EDGE_SEL register not "
+ qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: EDGE_SEL register not "
"present on this version of GPIO device\n",
TYPE_IMX_GPIO, __func__);
}
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s[%s]: Bad register at offset %d\n",
- TYPE_IMX_GPIO, __func__, (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
+ HWADDR_PRIx "\n", TYPE_IMX_GPIO, __func__, offset);
break;
}
- DPRINTF("(%s) = 0x%"PRIx32"\n", imx_gpio_reg_name(offset), reg_value);
+ DPRINTF("(%s) = 0x%" PRIx32 "\n", imx_gpio_reg_name(offset), reg_value);
return reg_value;
}
@@ -198,7 +199,7 @@ static void imx_gpio_write(void *opaque, hwaddr offset,
uint64_t value,
{
IMXGPIOState *s = IMX_GPIO(opaque);
- DPRINTF("(%s, value = 0x%"PRIx32")\n", imx_gpio_reg_name(offset),
+ DPRINTF("(%s, value = 0x%" PRIx32 ")\n", imx_gpio_reg_name(offset),
(uint32_t)value);
switch (offset) {
@@ -238,15 +239,15 @@ static void imx_gpio_write(void *opaque, hwaddr offset,
uint64_t value,
s->edge_sel = value;
imx_gpio_set_all_int_lines(s);
} else {
- qemu_log_mask(LOG_GUEST_ERROR, "%s[%s]: EDGE_SEL register not "
+ qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: EDGE_SEL register not "
"present on this version of GPIO device\n",
TYPE_IMX_GPIO, __func__);
}
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s[%s]: Bad register at offset %d\n",
- TYPE_IMX_GPIO, __func__, (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
+ HWADDR_PRIx "\n", TYPE_IMX_GPIO, __func__, offset);
break;
}
--
2.1.4
- [Qemu-devel] [PATCH v2 0/8] i.MX: Standardize debug code, Jean-Christophe Dubois, 2015/10/21
- [Qemu-devel] [PATCH v2 1/8] i.MX: Standardize i.MX serial debug., Jean-Christophe Dubois, 2015/10/21
- [Qemu-devel] [PATCH v2 2/8] i.MX: Standardize i.MX GPIO debug,
Jean-Christophe Dubois <=
- [Qemu-devel] [PATCH v2 3/8] i.MX: Standardize i.MX I2C debug, Jean-Christophe Dubois, 2015/10/21
- [Qemu-devel] [PATCH v2 4/8] i.MX: Standardize i.MX AVIC debug, Jean-Christophe Dubois, 2015/10/21
- [Qemu-devel] [PATCH v2 5/8] i.MX: Standardize i.MX CCM debug, Jean-Christophe Dubois, 2015/10/21
- [Qemu-devel] [PATCH v2 7/8] i.MX: Standardize i.MX EPIT debug, Jean-Christophe Dubois, 2015/10/21
- [Qemu-devel] [PATCH v2 8/8] i.MX: Standardize i.MX GPT debug, Jean-Christophe Dubois, 2015/10/21
- [Qemu-devel] [PATCH v2 6/8] i.MX: Standardize i.MX FEC debug, Jean-Christophe Dubois, 2015/10/21