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[Qemu-devel] [PULL 4/8] disas: QOMify sparc specific disas setup
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PULL 4/8] disas: QOMify sparc specific disas setup |
Date: |
Thu, 22 Oct 2015 18:22:35 +0200 |
From: Peter Crosthwaite <address@hidden>
Move the target_disas() sparc specifics to the QOM disas_set_info hook
and delete the #ifdef specific code in disas.c.
Cc: Mark Cave-Ayland <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
---
disas.c | 10 ----------
target-sparc/cpu.c | 9 +++++++++
2 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/disas.c b/disas.c
index 1ef2596..5b3acf0 100644
--- a/disas.c
+++ b/disas.c
@@ -214,11 +214,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong
code,
s.info.mach = bfd_mach_i386_i386;
}
s.info.print_insn = print_insn_i386;
-#elif defined(TARGET_SPARC)
- s.info.print_insn = print_insn_sparc;
-#ifdef TARGET_SPARC64
- s.info.mach = bfd_mach_sparc_v9b;
-#endif
#elif defined(TARGET_PPC)
if ((flags >> 16) & 1) {
s.info.endian = BFD_ENDIAN_LITTLE;
@@ -423,11 +418,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu,
s.info.print_insn = print_insn_i386;
#elif defined(TARGET_ALPHA)
s.info.print_insn = print_insn_alpha;
-#elif defined(TARGET_SPARC)
- s.info.print_insn = print_insn_sparc;
-#ifdef TARGET_SPARC64
- s.info.mach = bfd_mach_sparc_v9b;
-#endif
#elif defined(TARGET_PPC)
if (flags & 0xFFFF) {
/* If we have a precise definition of the instruction set, use it. */
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 82bb72a..d98682b 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -90,6 +90,14 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
return false;
}
+static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info)
+{
+ info->print_insn = print_insn_sparc;
+#ifdef TARGET_SPARC64
+ info->mach = bfd_mach_sparc_v9b;
+#endif
+}
+
static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
@@ -848,6 +856,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void
*data)
cc->do_unaligned_access = sparc_cpu_do_unaligned_access;
cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug;
#endif
+ cc->disas_set_info = cpu_sparc_disas_set_info;
#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
cc->gdb_num_core_regs = 86;
--
2.1.4
- [Qemu-devel] [PULL 0/8] QOM CPUState patch queue 2015-10-22, Andreas Färber, 2015/10/22
- [Qemu-devel] [PULL 6/8] disas: QOMify sh4 specific disas setup, Andreas Färber, 2015/10/22
- [Qemu-devel] [PULL 4/8] disas: QOMify sparc specific disas setup,
Andreas Färber <=
- [Qemu-devel] [PULL 5/8] disas: QOMify lm32 specific disas setup, Andreas Färber, 2015/10/22
- [Qemu-devel] [PULL 1/8] disas: QOMify s390x specific disas setup, Andreas Färber, 2015/10/22
- [Qemu-devel] [PULL 3/8] disas: QOMify m68k specific disas setup, Andreas Färber, 2015/10/22
- [Qemu-devel] [PULL 8/8] disas: QOMify alpha specific disas setup, Andreas Färber, 2015/10/22
- [Qemu-devel] [PULL 2/8] disas: QOMify moxie specific disas setup, Andreas Färber, 2015/10/22
- [Qemu-devel] [PULL 7/8] disas: QOMify mips specific disas setup, Andreas Färber, 2015/10/22
- Re: [Qemu-devel] [PULL 0/8] QOM CPUState patch queue 2015-10-22, Peter Maydell, 2015/10/22