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[Qemu-devel] [PULL 04/13] target-i386: Re-introduce optimal breakpoint r
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 04/13] target-i386: Re-introduce optimal breakpoint removal |
Date: |
Fri, 23 Oct 2015 13:33:03 -0200 |
From: Richard Henderson <address@hidden>
Before the last patch, we had an efficient loop that disabled
local breakpoints on task switch. Re-add that, but in a more
general way that handles changes to the global enable bits too.
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
target-i386/bpt_helper.c | 34 ++++++++++++++++++++++++++++------
1 file changed, 28 insertions(+), 6 deletions(-)
diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c
index f14788a..23ce828 100644
--- a/target-i386/bpt_helper.c
+++ b/target-i386/bpt_helper.c
@@ -82,14 +82,36 @@ static void hw_breakpoint_remove(CPUX86State *env, int
index)
void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
{
+ target_ulong old_dr7 = env->dr[7];
int i;
- for (i = 0; i < DR7_MAX_BP; i++) {
- hw_breakpoint_remove(env, i);
- }
- env->dr[7] = new_dr7;
- for (i = 0; i < DR7_MAX_BP; i++) {
- hw_breakpoint_insert(env, i);
+ /* If nothing is changing except the global/local enable bits,
+ then we can make the change more efficient. */
+ if (((old_dr7 ^ new_dr7) & ~0xff) == 0) {
+ /* Fold the global and local enable bits together into the
+ global fields, then xor to show which registers have
+ changed collective enable state. */
+ int mod = ((old_dr7 | old_dr7 * 2) ^ (new_dr7 | new_dr7 * 2)) & 0xff;
+
+ for (i = 0; i < DR7_MAX_BP; i++) {
+ if ((mod & (2 << i * 2)) && !hw_breakpoint_enabled(new_dr7, i)) {
+ hw_breakpoint_remove(env, i);
+ }
+ }
+ env->dr[7] = new_dr7;
+ for (i = 0; i < DR7_MAX_BP; i++) {
+ if (mod & (2 << i * 2) && hw_breakpoint_enabled(new_dr7, i)) {
+ hw_breakpoint_insert(env, i);
+ }
+ }
+ } else {
+ for (i = 0; i < DR7_MAX_BP; i++) {
+ hw_breakpoint_remove(env, i);
+ }
+ env->dr[7] = new_dr7;
+ for (i = 0; i < DR7_MAX_BP; i++) {
+ hw_breakpoint_insert(env, i);
+ }
}
}
#endif
--
2.1.0
- [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 02/13] target-i386: Disable cache info passthrough by default, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 01/13] target-i386: allow any alignment for SMBASE, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 03/13] target-i386: Introduce cpu_x86_update_dr7, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 04/13] target-i386: Re-introduce optimal breakpoint removal,
Eduardo Habkost <=
- [Qemu-devel] [PULL 05/13] target-i386: Ensure bit 10 on DR7 is never cleared, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 07/13] target-i386: Optimize setting dr[0-3], Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 06/13] target-i386: Move hw_*breakpoint_* functions, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 08/13] target-i386: Handle I/O breakpoints, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 10/13] target-i386: Ensure always-1 bits on DR6 can't be cleared, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 09/13] target-i386: Check CR4[DE] for processing DR4/DR5, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 11/13] target-i386: Add DE to TCG_FEATURES, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 12/13] target-i386: Use 1UL for bit shift, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 13/13] vl: trivial: minor tweaks to a max-cpu error msg, Eduardo Habkost, 2015/10/23
- Re: [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23, Peter Maydell, 2015/10/23