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[Qemu-devel] [PULL 11/13] target-i386: Add DE to TCG_FEATURES
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 11/13] target-i386: Add DE to TCG_FEATURES |
Date: |
Fri, 23 Oct 2015 13:33:10 -0200 |
Now DE is supported by TCG so it can be enabled in CPUID bits.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
target-i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 987253d..c92dd06 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -312,7 +312,7 @@ static const char *cpuid_6_feature_name[] = {
CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
- CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
+ CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS | CPUID_DE)
/* partly implemented:
CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64) */
/* missing:
--
2.1.0
- [Qemu-devel] [PULL 02/13] target-i386: Disable cache info passthrough by default, (continued)
- [Qemu-devel] [PULL 02/13] target-i386: Disable cache info passthrough by default, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 01/13] target-i386: allow any alignment for SMBASE, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 03/13] target-i386: Introduce cpu_x86_update_dr7, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 04/13] target-i386: Re-introduce optimal breakpoint removal, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 05/13] target-i386: Ensure bit 10 on DR7 is never cleared, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 07/13] target-i386: Optimize setting dr[0-3], Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 06/13] target-i386: Move hw_*breakpoint_* functions, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 08/13] target-i386: Handle I/O breakpoints, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 10/13] target-i386: Ensure always-1 bits on DR6 can't be cleared, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 09/13] target-i386: Check CR4[DE] for processing DR4/DR5, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 11/13] target-i386: Add DE to TCG_FEATURES,
Eduardo Habkost <=
- [Qemu-devel] [PULL 12/13] target-i386: Use 1UL for bit shift, Eduardo Habkost, 2015/10/23
- [Qemu-devel] [PULL 13/13] vl: trivial: minor tweaks to a max-cpu error msg, Eduardo Habkost, 2015/10/23
- Re: [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23, Peter Maydell, 2015/10/23