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Re: [Qemu-devel] [PATCH] hw/isa/lpc_ich9: inject the SMI on the VCPU tha


From: Paolo Bonzini
Subject: Re: [Qemu-devel] [PATCH] hw/isa/lpc_ich9: inject the SMI on the VCPU that is writing to APM_CNT
Date: Fri, 23 Oct 2015 19:00:38 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0


On 23/10/2015 18:54, Kevin O'Connor wrote:
>> > 
>> > Extra privileges compared to what?  Legacy BIOS does not really put
>> > anything privileged in SMRAM, while OVMF does and _hence_ relocates the
>> > SMBASE of the AP.  It would have been nice to get it right from the
>> > beginning, but right now it's not worth forcing a lockstep QEMU-SeaBIOS
>> > update.
> We could add code to SeaBIOS now that protects against multiple SMI
> handlers running, and then at some future date QEMU could be updated.
> I'll defer to your judgment if that makes sense.
> 
> BTW, how does OVMF handle SMIs on multiple processors?  Does it setup
> a unique SMBASE for each cpu, or does it inspect the apic id (or
> something similar) in the smi handler to determine which cpu should
> handle the event?

It does the former.

Paolo



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