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Re: [Qemu-devel] [PATCH v4 09/13] target-arm: Add ARMMMUFaultInfo
From: |
Edgar E. Iglesias |
Subject: |
Re: [Qemu-devel] [PATCH v4 09/13] target-arm: Add ARMMMUFaultInfo |
Date: |
Mon, 26 Oct 2015 10:53:30 +0100 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Fri, Oct 23, 2015 at 05:53:09PM +0100, Peter Maydell wrote:
> On 14 October 2015 at 23:55, Edgar E. Iglesias <address@hidden> wrote:
> > From: "Edgar E. Iglesias" <address@hidden>
> >
> > Introduce ARMMMUFaultInfo to propagate MMU Fault information
> > across the MMU translation code path. This is in preparation for
> > adding Stage-2 translation.
> >
> > No functional changes.
> >
> > Signed-off-by: Edgar E. Iglesias <address@hidden>
> > @@ -1774,9 +1775,10 @@ static uint64_t do_ats_write(CPUARMState *env,
> > uint64_t value,
> > bool ret;
> > uint64_t par64;
> > MemTxAttrs attrs = {};
> > + ARMMMUFaultInfo fi = {};
>
> Why are most of these initialized with "{}" ...
>
> > @@ -83,8 +83,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> > is_write, int mmu_idx,
> > {
> > bool ret;
> > uint32_t fsr = 0;
> > + struct ARMMMUFaultInfo fi = {0};
>
> ...but this one uses "{0}" ?
No reason.. I've removed the struct and zero so it's now:
ARMMMUFaultInfo fi = {};
everywhere.
Thanks,
Edgar
>
> Otherwise
> Reviewed-by: Peter Maydell <address@hidden>
>
> thanks
> -- PMM
- Re: [Qemu-devel] [PATCH v4 03/13] target-arm: Add support for AArch32 S2 negative t0sz, (continued)
[Qemu-devel] [PATCH v4 04/13] target-arm: lpae: Replace tsz with computed inputsize, Edgar E. Iglesias, 2015/10/14
[Qemu-devel] [PATCH v4 11/13] target-arm: Add S2 translation to 32bit S1 PTWs, Edgar E. Iglesias, 2015/10/14
[Qemu-devel] [PATCH v4 12/13] target-arm: Route S2 MMU faults to EL2, Edgar E. Iglesias, 2015/10/14
[Qemu-devel] [PATCH v4 09/13] target-arm: Add ARMMMUFaultInfo, Edgar E. Iglesias, 2015/10/14
[Qemu-devel] [PATCH v4 10/13] target-arm: Add S2 translation to 64bit S1 PTWs, Edgar E. Iglesias, 2015/10/14
[Qemu-devel] [PATCH v4 07/13] target-arm: Add support for S2 page-table protection bits, Edgar E. Iglesias, 2015/10/14
[Qemu-devel] [PATCH v4 08/13] target-arm: Avoid inline for get_phys_addr, Edgar E. Iglesias, 2015/10/14
[Qemu-devel] [PATCH v4 13/13] target-arm: Add support for S1 + S2 MMU translations, Edgar E. Iglesias, 2015/10/14
[Qemu-devel] [PATCH v4 05/13] target-arm: lpae: Rename granule_sz to stride, Edgar E. Iglesias, 2015/10/15