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[Qemu-devel] [PULL 09/13] target-arm: Bring AArch64 debug CPU display of
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 09/13] target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32 |
Date: |
Tue, 3 Nov 2015 14:13:15 +0000 |
The AArch64 debug CPU display of PSTATE as "PSTATE=200003c5 (flags --C-)"
on the end of the same line as the last of the general purpose registers
is unnecessarily different from the AArch32 display of PSR as
"PSR=200001d3 --C- A svc32" on its own line. Update the AArch64
code to put PSTATE in its own line and in the same format, including
printing the exception level (mode).
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
---
target-arm/translate-a64.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 83b8376..57503a0 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -126,6 +126,7 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
CPUARMState *env = &cpu->env;
uint32_t psr = pstate_read(env);
int i;
+ int el = arm_current_el(env);
cpu_fprintf(f, "PC=%016"PRIx64" SP=%016"PRIx64"\n",
env->pc, env->xregs[31]);
@@ -137,13 +138,14 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
cpu_fprintf(f, " ");
}
}
- cpu_fprintf(f, "PSTATE=%08x (flags %c%c%c%c)\n",
+ cpu_fprintf(f, "\nPSTATE=%08x %c%c%c%c EL%d%c\n",
psr,
psr & PSTATE_N ? 'N' : '-',
psr & PSTATE_Z ? 'Z' : '-',
psr & PSTATE_C ? 'C' : '-',
- psr & PSTATE_V ? 'V' : '-');
- cpu_fprintf(f, "\n");
+ psr & PSTATE_V ? 'V' : '-',
+ el,
+ psr & PSTATE_SP ? 'h' : 't');
if (flags & CPU_DUMP_FPU) {
int numvfpregs = 32;
--
1.9.1
- [Qemu-devel] [PULL 00/13] target-arm queue, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 11/13] hw/arm/virt-acpi-build: _CCA attribute is compulsory, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 09/13] target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32,
Peter Maydell <=
- [Qemu-devel] [PULL 04/13] arm: xilinx_zynq: Add linux pre-boot, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 10/13] target-arm: Report S/NS status in the CPU debug logs, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 07/13] arm: stellaris: exit on external reset request, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 13/13] ARM: ACPI: Fix MPIDR value in ACPI table, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 03/13] arm: boot: Add board specific setup code API, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 08/13] MAINTAINERS: Add new qemu-arm mailing list to ARM related entries, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 05/13] armv7-m: Return DeviceState* from armv7m_init(), Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 12/13] hw/arm/virt-acpi-build: Add GICC ACPI subtable for GICv3, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 02/13] arm: boot: Adjust indentation of FIXUP comments, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 01/13] target-arm: Add and use symbolic names for register banks, Peter Maydell, 2015/11/03