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[Qemu-devel] [PULL 06/13] armv7-m: Implement SYSRESETREQ
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/13] armv7-m: Implement SYSRESETREQ |
Date: |
Tue, 3 Nov 2015 14:13:12 +0000 |
From: Michael Davidsaver <address@hidden>
Implement the SYSRESETREQ bit of the AIRCR register
for armv7-m (ie. cortex-m3) to trigger a GPIO out.
Signed-off-by: Michael Davidsaver <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/intc/armv7m_nvic.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 3ec8408..6fc167e 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -28,6 +28,7 @@ typedef struct {
MemoryRegion gic_iomem_alias;
MemoryRegion container;
uint32_t num_irq;
+ qemu_irq sysresetreq;
} nvic_state;
#define TYPE_NVIC "armv7m_nvic"
@@ -348,10 +349,13 @@ static void nvic_writel(nvic_state *s, uint32_t offset,
uint32_t value)
break;
case 0xd0c: /* Application Interrupt/Reset Control. */
if ((value >> 16) == 0x05fa) {
+ if (value & 4) {
+ qemu_irq_pulse(s->sysresetreq);
+ }
if (value & 2) {
qemu_log_mask(LOG_UNIMP, "VECTCLRACTIVE unimplemented\n");
}
- if (value & 5) {
+ if (value & 1) {
qemu_log_mask(LOG_UNIMP, "AIRCR system reset unimplemented\n");
}
if (value & 0x700) {
@@ -535,11 +539,14 @@ static void armv7m_nvic_instance_init(Object *obj)
* value in the GICState struct.
*/
GICState *s = ARM_GIC_COMMON(obj);
+ DeviceState *dev = DEVICE(obj);
+ nvic_state *nvic = NVIC(obj);
/* The ARM v7m may have anything from 0 to 496 external interrupt
* IRQ lines. We default to 64. Other boards may differ and should
* set the num-irq property appropriately.
*/
s->num_irq = 64;
+ qdev_init_gpio_out_named(dev, &nvic->sysresetreq, "SYSRESETREQ", 1);
}
static void armv7m_nvic_class_init(ObjectClass *klass, void *data)
--
1.9.1
- [Qemu-devel] [PULL 04/13] arm: xilinx_zynq: Add linux pre-boot, (continued)
- [Qemu-devel] [PULL 04/13] arm: xilinx_zynq: Add linux pre-boot, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 10/13] target-arm: Report S/NS status in the CPU debug logs, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 07/13] arm: stellaris: exit on external reset request, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 13/13] ARM: ACPI: Fix MPIDR value in ACPI table, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 03/13] arm: boot: Add board specific setup code API, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 08/13] MAINTAINERS: Add new qemu-arm mailing list to ARM related entries, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 05/13] armv7-m: Return DeviceState* from armv7m_init(), Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 12/13] hw/arm/virt-acpi-build: Add GICC ACPI subtable for GICv3, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 02/13] arm: boot: Adjust indentation of FIXUP comments, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 01/13] target-arm: Add and use symbolic names for register banks, Peter Maydell, 2015/11/03
- [Qemu-devel] [PULL 06/13] armv7-m: Implement SYSRESETREQ,
Peter Maydell <=
- Re: [Qemu-devel] [PULL 00/13] target-arm queue, Peter Maydell, 2015/11/03