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Re: [Qemu-devel] [Qemu-ppc] [PATCH 13/77] ppc: tlbie, tlbia and tlbisync


From: Benjamin Herrenschmidt
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 13/77] ppc: tlbie, tlbia and tlbisync are HV only
Date: Wed, 18 Nov 2015 11:06:15 +1100

On Mon, 2015-11-16 at 21:21 +1100, Benjamin Herrenschmidt wrote:
> 
> Ah you are right. I do have second thoughts about that previous patch
> now that you mention it however. In the real MSR, HV and PR are
> independant, I wonder if I'm better off making the check explicit...
> 
> The reason I did it this way is that afaik, there is no such thing
> as a usermode hypervisor resource in the architecture, so any
> hypervisor resource is also a supervisor mode one, but having
> ctx->hv be 0 when MSR:HV=1 + MSR:PR=1 might make it easy to write
> incorrect code in other places when deciding for example how to
> direct
> interrupts.
> 
> I'll need to think a bit more about this one.

So I took out that bit in the previous patch, since we already seem
to check ctx.pr explicitly in most places anyway. There was one where
we didn't which I fixed (in the SMT ops).

Cheers,
Ben.




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