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Re: [Qemu-devel] [Qemu-ppc] [PATCH 15/77] ppc: Fix sign extension issue
From: |
Benjamin Herrenschmidt |
Subject: |
Re: [Qemu-devel] [Qemu-ppc] [PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) emulation |
Date: |
Thu, 19 Nov 2015 21:26:18 +1100 |
On Thu, 2015-11-19 at 17:26 +1100, David Gibson wrote:
> On Wed, Nov 11, 2015 at 11:27:28AM +1100, Benjamin Herrenschmidt
> wrote:
> > From: Michael Neuling <address@hidden>
> >
> > Signed-off-by: Michael Neuling <address@hidden>
> > Signed-off-by: Benjamin Herrenschmidt <address@hidden>
>
> Reviewed-by: David Gibson <address@hidden>
>
> Looks correct, though my memory of C promotion rules is obviously a
> bit stale, since I'm not immediately seeing why the original was
> wrong.
Well, at least it makes things work :-)
> > ---
> > target-ppc/translate.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> > index bd5df40..3974cd2 100644
> > --- a/target-ppc/translate.c
> > +++ b/target-ppc/translate.c
> > @@ -4391,7 +4391,7 @@ static void gen_mtmsrd(DisasContext *ctx)
> > /* Special form that does not need any synchronisation */
> > TCGv t0 = tcg_temp_new();
> > tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], (1 <<
> > MSR_RI) | (1 << MSR_EE));
> > - tcg_gen_andi_tl(cpu_msr, cpu_msr, ~((1 << MSR_RI) | (1 <<
> > MSR_EE)));
> > + tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(target_ulong)((1 <<
> > MSR_RI) | (1 << MSR_EE)));
> > tcg_gen_or_tl(cpu_msr, cpu_msr, t0);
> > tcg_temp_free(t0);
> > } else {
> > @@ -4422,7 +4422,7 @@ static void gen_mtmsr(DisasContext *ctx)
> > /* Special form that does not need any synchronisation */
> > TCGv t0 = tcg_temp_new();
> > tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], (1 <<
> > MSR_RI) | (1 << MSR_EE));
> > - tcg_gen_andi_tl(cpu_msr, cpu_msr, ~((1 << MSR_RI) | (1 <<
> > MSR_EE)));
> > + tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(target_ulong)((1 <<
> > MSR_RI) | (1 << MSR_EE)));
> > tcg_gen_or_tl(cpu_msr, cpu_msr, t0);
> > tcg_temp_free(t0);
> > } else {
>
- Re: [Qemu-devel] [Qemu-ppc] [PATCH 00/77] ppc: Add "native" POWER8 platform, (continued)
Re: [Qemu-devel] [Qemu-ppc] [PATCH 00/77] ppc: Add "native" POWER8 platform, Stewart Smith, 2015/11/10
[Qemu-devel] [PATCH 24/77] ppc: Move exception generation code out of line, Benjamin Herrenschmidt, 2015/11/10
[Qemu-devel] [PATCH 37/77] ppc/xics: Split ICS into base class and "simple" implementation, Benjamin Herrenschmidt, 2015/11/10
[Qemu-devel] [PATCH 10/77] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV, Benjamin Herrenschmidt, 2015/11/10
[Qemu-devel] [PATCH 22/77] ppc: Add real mode CI load/store instructions for P7 and P8, Benjamin Herrenschmidt, 2015/11/10
[Qemu-devel] [PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) emulation, Benjamin Herrenschmidt, 2015/11/10
[Qemu-devel] [PATCH 16/77] ppc: Get out of emulation on SMT "OR" ops, Benjamin Herrenschmidt, 2015/11/10
[Qemu-devel] [PATCH 48/77] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge, Benjamin Herrenschmidt, 2015/11/10