[Qemu-devel] [PATCH v1 1/5] lib/x86: Added Hyper-V MSR's availability bits into msr.h

[Andrey Smetanin]

Signed-off-by: Andrey Smetanin <address@hidden>
Reviewed-by: Roman Kagan <address@hidden>
CC: Paolo Bonzini <address@hidden>
CC: Marcelo Tosatti <address@hidden>
CC: Roman Kagan <address@hidden>
CC: Denis V. Lunev <address@hidden>
CC: address@hidden

---
 lib/x86/msr.h      | 4 ++++
 x86/hyperv_synic.c | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/lib/x86/msr.h b/lib/x86/msr.h
index 54da420..89ed718 100644
--- a/lib/x86/msr.h
+++ b/lib/x86/msr.h
@@ -408,6 +408,10 @@
 #define MSR_VM_IGNNE                    0xc0010115
 #define MSR_VM_HSAVE_PA                 0xc0010117
 
+#define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE     (1 << 1)
+#define HV_X64_MSR_SYNIC_AVAILABLE              (1 << 2)
+#define HV_X64_MSR_SYNTIMER_AVAILABLE           (1 << 3)
+
 /* Define synthetic interrupt controller model specific registers. */
 #define HV_X64_MSR_SCONTROL                     0x40000080
 #define HV_X64_MSR_SVERSION                     0x40000081
diff --git a/x86/hyperv_synic.c b/x86/hyperv_synic.c
index 18d1295..eb141c1 100644
--- a/x86/hyperv_synic.c
+++ b/x86/hyperv_synic.c
@@ -11,7 +11,7 @@
 
 #define MAX_CPUS 4
 #define HYPERV_CPUID_FEATURES                   0x40000003
-#define HV_X64_MSR_SYNIC_AVAILABLE              (1 << 2)
+
 #define HV_SYNIC_CONTROL_ENABLE                 (1ULL << 0)
 #define HV_SYNIC_SIMP_ENABLE                    (1ULL << 0)
 #define HV_SYNIC_SIEFP_ENABLE                   (1ULL << 0)
-- 
2.4.3