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Re: [Qemu-devel] [PATCH v3 0/3] target-i386: add memory protection-key s
From: |
Eduardo Habkost |
Subject: |
Re: [Qemu-devel] [PATCH v3 0/3] target-i386: add memory protection-key support |
Date: |
Fri, 4 Dec 2015 12:57:04 -0200 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On Wed, Nov 18, 2015 at 10:20:14AM +0800, Huaitong Han wrote:
> Changes in v3:
> *Fix cpuid_7_0_ecx_feature_name error.
>
> Changes in v2:
> *Fix memcpy error for xsave state.
> *Fix TCG_7_0_ECX_FEATURES to 0.
> *Make subjects more readable.
>
> The protection-key feature provides an additional mechanism by which IA-32e
> paging controls access to usermode addresses.
>
> Hardware support for protection keys for user pages is enumerated with CPUID
> feature flag CPUID.7.0.ECX[3]:PKU. Software support is CPUID.7.0.ECX[4]:OSPKE
> with the setting of CR4.PKE(bit 22).
>
> The PKRU register is XSAVE-managed state CPUID.D.0.EAX[9], the size of XSAVE
> state component for PKRU is 8 bytes, the offset is 0xa80.
>
> The specification of Protection Keys can be found at SDM (4.6.2, volume 3)
> http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf.
Reviewed-by: Eduardo Habkost <address@hidden>
The patches were squashed together and queued in x86-next branch
for 2.6.
>
> Huaitong Han (3):
> target-i386: add pkeys support for cpuid handling
> target-i386: add pkeys support for xsave state handling
> target-i386: add pkeys support for vm migration
>
> target-i386/cpu.c | 23 ++++++++++++++++++++++-
> target-i386/cpu.h | 7 +++++++
> target-i386/kvm.c | 3 +++
> target-i386/machine.c | 23 +++++++++++++++++++++++
> 4 files changed, 55 insertions(+), 1 deletion(-)
>
> --
> 2.4.3
>
>
--
Eduardo
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