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[Qemu-devel] [PULL 05/17] target-arm: Rename check_s2_startlevel to chec
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 05/17] target-arm: Rename check_s2_startlevel to check_s2_mmu_setup |
Date: |
Wed, 3 Feb 2016 18:59:08 +0000 |
From: "Edgar E. Iglesias" <address@hidden>
Rename check_s2_startlevel to check_s2_mmu_setup in preparation
for additional checks.
Signed-off-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index f5e6fb1..31ff650 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6763,17 +6763,18 @@ typedef enum {
} MMUFaultType;
/*
- * check_s2_startlevel
+ * check_s2_mmu_setup
* @cpu: ARMCPU
* @is_aa64: True if the translation regime is in AArch64 state
* @startlevel: Suggested starting level
* @inputsize: Bitsize of IPAs
* @stride: Page-table stride (See the ARM ARM)
*
- * Returns true if the suggested starting level is OK and false otherwise.
+ * Returns true if the suggested S2 translation parameters are OK and
+ * false otherwise.
*/
-static bool check_s2_startlevel(ARMCPU *cpu, bool is_aa64, int level,
- int inputsize, int stride)
+static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level,
+ int inputsize, int stride)
{
const int grainsize = stride + 3;
int startsizecheck;
@@ -7013,8 +7014,7 @@ static bool get_phys_addr_lpae(CPUARMState *env,
target_ulong address,
}
/* Check that the starting level is valid. */
- ok = check_s2_startlevel(cpu, va_size == 64, level,
- inputsize, stride);
+ ok = check_s2_mmu_setup(cpu, va_size == 64, level, inputsize, stride);
if (!ok) {
/* AArch64 reports these as level 0 faults.
* AArch32 reports these as level 1 faults.
--
1.9.1
- [Qemu-devel] [PULL 00/17] target-arm queue, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 01/17] virt-acpi-build: add always-on property for timer, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 16/17] arm/boot: move highbank secure board setup code to common routine, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 17/17] raspi: add raspberry pi 2 machine, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 15/17] bcm2836: add bcm2836 SoC device, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 05/17] target-arm: Rename check_s2_startlevel to check_s2_mmu_setup,
Peter Maydell <=
- [Qemu-devel] [PULL 08/17] libvixl: Avoid std::abs() of 64-bit type, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 12/17] bcm2835_ic: add bcm2835 interrupt controller, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 11/17] bcm2835_property: add bcm2835 property channel, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 02/17] target-arm: Make various system registers visible to EL3, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 09/17] target-arm: Don't report presence of EL2 if it doesn't exist, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 03/17] hw/arm: Setup EL1 and EL2 in AArch64 mode for 64bit Linux boots, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 04/17] target-arm: Apply S2 MMU startlevel table size check to AArch64, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 10/17] bcm2835_mbox: add BCM2835 mailboxes, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 14/17] bcm2836_control: add bcm2836 ARM control logic, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 06/17] target-arm: Implement the S2 MMU inputsize > pamax check, Peter Maydell, 2016/02/03