[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 4/6] target-arm: Implement MDCR_EL2.TDRA traps
From: |
Sergey Fedorov |
Subject: |
Re: [Qemu-devel] [PATCH 4/6] target-arm: Implement MDCR_EL2.TDRA traps |
Date: |
Mon, 8 Feb 2016 18:56:03 +0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 |
On 05.02.2016 19:45, Peter Maydell wrote:
> Implement trapping of the "debug ROM" registers, which are controlled
> by MDCR_EL2.TDRA for EL2 but by the more general MDCR_EL3.TDA for EL3.
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>
> ---
> target-arm/helper.c | 27 ++++++++++++++++++++++++---
> 1 file changed, 24 insertions(+), 3 deletions(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 18e85fd..8c2adbc 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -402,6 +402,24 @@ static CPAccessResult access_tdosa(CPUARMState *env,
> const ARMCPRegInfo *ri,
> return CP_ACCESS_OK;
> }
>
> +/* Check for traps to "debug ROM" registers, which are controlled
> + * by MDCR_EL2.TDRA for EL2 but by the more general MDCR_EL3.TDA for EL3.
> + */
> +static CPAccessResult access_tdra(CPUARMState *env, const ARMCPRegInfo *ri,
> + bool isread)
> +{
> + int el = arm_current_el(env);
> +
> + if (el < 2 && (env->cp15.mdcr_el2 & MDCR_TDRA)
> + && !arm_is_secure_below_el3(env)) {
> + return CP_ACCESS_TRAP_EL2;
> + }
> + if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TDA)) {
> + return CP_ACCESS_TRAP_EL3;
> + }
> + return CP_ACCESS_OK;
> +}
> +
> static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t
> value)
> {
> ARMCPU *cpu = arm_env_get_cpu(env);
> @@ -3774,12 +3792,15 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
> * accessor.
> */
> { .name = "DBGDRAR", .cp = 14, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 0,
> - .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
> + .access = PL0_R, .accessfn = access_tdra,
> + .type = ARM_CP_CONST, .resetvalue = 0 },
> { .name = "MDRAR_EL1", .state = ARM_CP_STATE_AA64,
> .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 0,
> - .access = PL1_R, .type = ARM_CP_CONST, .resetvalue = 0 },
> + .access = PL1_R, .accessfn = access_tdra,
> + .type = ARM_CP_CONST, .resetvalue = 0 },
> { .name = "DBGDSAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
> - .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
> + .access = PL0_R, .accessfn = access_tdra,
> + .type = ARM_CP_CONST, .resetvalue = 0 },
> /* Monitor debug system control register; the 32-bit alias is
> DBGDSCRext. */
> { .name = "MDSCR_EL1", .state = ARM_CP_STATE_BOTH,
> .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
- [Qemu-devel] [PATCH 0/6] target-arm: Implement various EL3 traps, Peter Maydell, 2016/02/05
- [Qemu-devel] [PATCH 4/6] target-arm: Implement MDCR_EL2.TDRA traps, Peter Maydell, 2016/02/05
- Re: [Qemu-devel] [PATCH 4/6] target-arm: Implement MDCR_EL2.TDRA traps,
Sergey Fedorov <=
- [Qemu-devel] [PATCH 6/6] target-arm: Report correct syndrome for FPEXC32_EL2 traps, Peter Maydell, 2016/02/05
- [Qemu-devel] [PATCH 3/6] target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps, Peter Maydell, 2016/02/05
- [Qemu-devel] [PATCH 1/6] target-arm: correct CNTFRQ access rights, Peter Maydell, 2016/02/05