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Re: [Qemu-devel] [PATCH 6/6] target-arm: Report correct syndrome for FPE
From: |
Sergey Fedorov |
Subject: |
Re: [Qemu-devel] [PATCH 6/6] target-arm: Report correct syndrome for FPEXC32_EL2 traps |
Date: |
Mon, 8 Feb 2016 19:40:10 +0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 |
On 05.02.2016 19:45, Peter Maydell wrote:
> If access to FPEXC32_EL2 is trapped by CPTR_EL2.TFP or CPTR_EL3.TFP,
> this should be reported with a syndrome register indicating an
> FP access trap, not one indicating a system register access trap.
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>
> ---
> target-arm/cpu.h | 5 +++++
> target-arm/helper.c | 4 ++--
> target-arm/op_helper.c | 13 +++++++++++++
> 3 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index d1d6886..a959ad6 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -1322,6 +1322,11 @@ typedef enum CPAccessResult {
> /* As CP_ACCESS_UNCATEGORIZED, but for traps directly to EL2 or EL3 */
> CP_ACCESS_TRAP_UNCATEGORIZED_EL2 = 5,
> CP_ACCESS_TRAP_UNCATEGORIZED_EL3 = 6,
> + /* Access fails and results in an exception syndrome for an FP access,
> + * trapped directly to EL2 or EL3
> + */
> + CP_ACCESS_TRAP_FP_EL2 = 7,
> + CP_ACCESS_TRAP_FP_EL3 = 8,
> } CPAccessResult;
>
> /* Access functions for coprocessor registers. These cannot fail and
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 064b415..163a72a 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -3012,10 +3012,10 @@ static CPAccessResult fpexc32_access(CPUARMState
> *env, const ARMCPRegInfo *ri,
> bool isread)
> {
> if ((env->cp15.cptr_el[2] & CPTR_TFP) && arm_current_el(env) == 2) {
> - return CP_ACCESS_TRAP_EL2;
> + return CP_ACCESS_TRAP_FP_EL2;
> }
> if (env->cp15.cptr_el[3] & CPTR_TFP) {
> - return CP_ACCESS_TRAP_EL3;
> + return CP_ACCESS_TRAP_FP_EL3;
> }
> return CP_ACCESS_OK;
> }
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index 4fedae5..754f080 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -500,6 +500,19 @@ void HELPER(access_check_cp_reg)(CPUARMState *env, void
> *rip, uint32_t syndrome,
> target_el = 3;
> syndrome = syn_uncategorized();
> break;
> + case CP_ACCESS_TRAP_FP_EL2:
> + target_el = 2;
> + /* Since we are an implementation that takes exceptions on a trapped
> + * conditional insn only if the insn has passed its condition code
> + * check, we take the IMPDEF choice to always report CV=1 COND=0xe
> + * (which is also the required value for AArch64 traps).
> + */
> + syndrome = syn_fp_access_trap(1, 0xe, false);
> + break;
> + case CP_ACCESS_TRAP_FP_EL3:
> + target_el = 3;
> + syndrome = syn_fp_access_trap(1, 0xe, false);
> + break;
> default:
> g_assert_not_reached();
> }
- [Qemu-devel] [PATCH 0/6] target-arm: Implement various EL3 traps, Peter Maydell, 2016/02/05
- [Qemu-devel] [PATCH 4/6] target-arm: Implement MDCR_EL2.TDRA traps, Peter Maydell, 2016/02/05
- [Qemu-devel] [PATCH 6/6] target-arm: Report correct syndrome for FPEXC32_EL2 traps, Peter Maydell, 2016/02/05
- Re: [Qemu-devel] [PATCH 6/6] target-arm: Report correct syndrome for FPEXC32_EL2 traps,
Sergey Fedorov <=
- [Qemu-devel] [PATCH 3/6] target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps, Peter Maydell, 2016/02/05
- [Qemu-devel] [PATCH 1/6] target-arm: correct CNTFRQ access rights, Peter Maydell, 2016/02/05