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[Qemu-devel] [PATCH v2 11/16] tcg-mips: Adjust calling conventions for m
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v2 11/16] tcg-mips: Adjust calling conventions for mips64 |
Date: |
Mon, 15 Feb 2016 14:42:29 +1100 |
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/mips/tcg-target.c | 21 +++++++++++++++------
tcg/mips/tcg-target.h | 19 +++++++++++++++----
2 files changed, 30 insertions(+), 10 deletions(-)
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index f61d6c7..8fb2ab0 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -98,10 +98,6 @@ static const TCGReg tcg_target_reg_alloc_order[] = {
TCG_REG_S8,
/* Call clobbered registers. */
- TCG_REG_T0,
- TCG_REG_T1,
- TCG_REG_T2,
- TCG_REG_T3,
TCG_REG_T4,
TCG_REG_T5,
TCG_REG_T6,
@@ -112,17 +108,27 @@ static const TCGReg tcg_target_reg_alloc_order[] = {
TCG_REG_V0,
/* Argument registers, opposite order of allocation. */
+ TCG_REG_T3,
+ TCG_REG_T2,
+ TCG_REG_T1,
+ TCG_REG_T0,
TCG_REG_A3,
TCG_REG_A2,
TCG_REG_A1,
TCG_REG_A0,
};
-static const TCGReg tcg_target_call_iarg_regs[4] = {
+static const TCGReg tcg_target_call_iarg_regs[] = {
TCG_REG_A0,
TCG_REG_A1,
TCG_REG_A2,
- TCG_REG_A3
+ TCG_REG_A3,
+#if _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
+ TCG_REG_T0,
+ TCG_REG_T1,
+ TCG_REG_T2,
+ TCG_REG_T3,
+#endif
};
static const TCGReg tcg_target_call_oarg_regs[2] = {
@@ -2453,6 +2459,9 @@ static void tcg_target_init(TCGContext *s)
{
tcg_target_detect_isa();
tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff);
+ if (TCG_TARGET_REG_BITS == 64) {
+ tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I64], 0xffffffff);
+ }
tcg_regset_set(tcg_target_call_clobber_regs,
(1 << TCG_REG_V0) |
(1 << TCG_REG_V1) |
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 1a9e54c..3eb771f 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -26,7 +26,14 @@
#ifndef TCG_TARGET_MIPS
#define TCG_TARGET_MIPS 1
-#define TCG_TARGET_REG_BITS 32
+#if _MIPS_SIM == _ABIO32
+# define TCG_TARGET_REG_BITS 32
+#elif _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
+# define TCG_TARGET_REG_BITS 64
+#else
+# error "Unknown ABI"
+#endif
+
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
#define TCG_TARGET_NB_REGS 32
@@ -70,9 +77,13 @@ typedef enum {
} TCGReg;
/* used for function call generation */
-#define TCG_TARGET_STACK_ALIGN 8
-#define TCG_TARGET_CALL_STACK_OFFSET 16
-#define TCG_TARGET_CALL_ALIGN_ARGS 1
+#define TCG_TARGET_STACK_ALIGN 16
+#if _MIPS_SIM == _ABIO32
+# define TCG_TARGET_CALL_STACK_OFFSET 16
+#else
+# define TCG_TARGET_CALL_STACK_OFFSET 0
+#endif
+#define TCG_TARGET_CALL_ALIGN_ARGS 1
/* MOVN/MOVZ instructions detection */
#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \
--
2.5.0
- Re: [Qemu-devel] [PATCH v2 01/16] tcg-mips: Always use tcg_debug_assert, (continued)
- [Qemu-devel] [PATCH v2 02/16] tcg-mips: Move bswap code to a subroutine, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 03/16] tcg-mips: Add mips64 opcodes, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 05/16] tcg-mips: Add bswap32u and bswap64, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 06/16] tcg-mips: Adjust move functions for mips64, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 04/16] tcg-mips: Support 64-bit opcodes, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 07/16] tcg-mips: Adjust load/store functions for mips64, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 08/16] tcg-mips: Adjust prologue for mips64, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 09/16] tcg-mips: Add tcg unwind info, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 10/16] tcg-mips: Adjust qemu_ld/st for mips64, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 11/16] tcg-mips: Adjust calling conventions for mips64,
Richard Henderson <=
- [Qemu-devel] [PATCH v2 12/16] tcg-mips: Improve tcg_out_movi for mips64, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 13/16] tcg-mips: Use mips64r6 instructions in tcg_out_ldst, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 14/16] tcg-mips: Use mips64r6 instructions in constant addition, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 16/16] tcg-mips: Use mipsr6 instructions in calls, Richard Henderson, 2016/02/14
- [Qemu-devel] [PATCH v2 15/16] tcg-mips: Use mipsr6 instructions in branches, Richard Henderson, 2016/02/14
- Re: [Qemu-devel] [PATCH v2 00/16] tcg mips64 and mips r6 improvements, Richard Henderson, 2016/02/14
- Re: [Qemu-devel] [PATCH v2 00/16] tcg mips64 and mips r6 improvements, Aurelien Jarno, 2016/02/28