Re: [Qemu-devel] [PATCH v2 4/4] i.MX: Add SPI NOR FLASH memory to sabrelite board.

[Peter Maydell]

On 25 February 2016 at 20:37, Jean-Christophe DUBOIS
<address@hidden> wrote:
> Le 25/02/2016 15:33, Peter Maydell a écrit :
>>
>> On 15 February 2016 at 11:18, Jean-Christophe Dubois
>> <address@hidden> wrote:
>>>
>>> Signed-off-by: Jean-Christophe Dubois <address@hidden>
>>> ---
>>>
>>> Changes since v1:
>>>   * Not present on v1.
>>>
>>>   hw/arm/sabrelite.c | 9 +++++++++
>>>   1 file changed, 9 insertions(+)
>>>
>>> diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
>>> index 8db9bbc..237dfa1 100644
>>> --- a/hw/arm/sabrelite.c
>>> +++ b/hw/arm/sabrelite.c
>>> @@ -70,6 +70,15 @@ static void sabrelite_init(MachineState *machine)
>>>       memory_region_add_subregion(get_system_memory(),
>>> FSL_IMX6_MMDC_ADDR,
>>>                                   &s->ram);
>>>
>>> +    {
>>> +        /* Add the sst25vf016b NOR FLASH memory to first SPI */
>>> +        SSIBus *spi = (SSIBus
>>> *)qdev_get_child_bus(DEVICE(&s->soc.spi[0]),
>>> +                                                   "spi");
>>
>> Rather than having the board code looking into the internals
>> of the SoC struct like this, you should have the SoC create an
>> spi bus property for itself, and then here you can just have
>>
>>        spibus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), "spi");
>
>
> I have 5 SPI Controllers so I should do it for each of them. And maybe also
> for I2C, SDHC  and other devices ...
>
> There might be a lot of properties a the end ...
>
> What would be the rule?
>
> Is there a recommended naming scheme?

We seem to be using "spi0", "spi1", etc. The zynqmp actually
has multiple SPI controllers too so you can use the code it
has to loop round creating properties.

thanks
-- PMM