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[Qemu-devel] [PATCH 1/3] target-tricore: add missing break in insn decod
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From: |
Bastian Koppelmann |
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Subject: |
[Qemu-devel] [PATCH 1/3] target-tricore: add missing break in insn decode switch stmt |
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Date: |
Tue, 1 Mar 2016 18:15:24 +0100 |
After decoding/translating a RRR_DIVIDE type instruction we would simply
fall through and would decode/translate another unintended RRR2_MADD
instruction.
Signed-off-by: Bastian Koppelmann <address@hidden>
---
target-tricore/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 6d7f553..f028fb9 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -8632,6 +8632,7 @@ static void decode_32Bit_opc(CPUTriCoreState *env,
DisasContext *ctx)
break;
case OPCM_32_RRR_DIVIDE:
decode_rrr_divide(env, ctx);
+ break;
/* RRR2 Format */
case OPCM_32_RRR2_MADD:
decode_rrr2_madd(env, ctx);
--
2.7.2