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Re: [Qemu-devel] [PATCH 0/3] ppc: Define some more SPRs of POWER8 in QEM
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From: |
David Gibson |
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Subject: |
Re: [Qemu-devel] [PATCH 0/3] ppc: Define some more SPRs of POWER8 in QEMU to fix migration |
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Date: |
Thu, 3 Mar 2016 11:01:19 +1100 |
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User-agent: |
Mutt/1.5.24 (2015-08-30) |
On Wed, Mar 02, 2016 at 09:19:19PM +0100, Thomas Huth wrote:
> While tinkering with the new kvm-unit-tests framework for Power,
> I discovered that a couple of SPRs are destroyed during migration.
> We've got to define them in QEMU and make sure that they are
> synchronized with the kernel to make sure that the register
> contents are not lost.
> The first patch introduces the new PSPB register from POWER8,
> second patcch fixes the definition of the TAR register, and
> the third patch (which has been taken from Ben's "Add native
> POWER8 platform" patch series) introduces some missing
> performance monitor registers.
Nice catches. Applied to ppc-for-2.6.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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