Re: [Qemu-devel] [PATCH v3 3/3] hw/arm: Add ASPEED AST2400 machine model

[Peter Maydell]

On 5 March 2016 at 11:29, Andrew Jeffery <address@hidden> wrote:
> Adds an AST2400 ARM machine[1], based around an AST2400 SOC containing an
> ARM926 processor, ASPEED VIC and timer devices, and a 8250 UART. The new
> machine type is functional enough to boot an aspeed_defconfig Linux
> kernel to userspace.
>
> [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376
>
> Signed-off-by: Andrew Jeffery <address@hidden>
> ---
> Since v2:
>   * Implement a SOC model to move code out from the machine definition
>   * Rework the machine to better use QOM
>   * Include qemu/osdep.h
>   * Revert back to qemu_log_mask(LOG_UNIMP, ...) in IO handlers
>
> Since v1:
>
>  hw/arm/Makefile.objs |   1 +
>  hw/arm/ast2400.c     | 208 
> +++++++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 209 insertions(+)
>  create mode 100644 hw/arm/ast2400.c
>
> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> index a711e4d..f333b7f 100644
> --- a/hw/arm/Makefile.objs
> +++ b/hw/arm/Makefile.objs
> @@ -16,3 +16,4 @@ obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o
>  obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o xlnx-ep108.o
>  obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o
>  obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
> +obj-$(CONFIG_ASPEED_SOC) += ast2400.o
> diff --git a/hw/arm/ast2400.c b/hw/arm/ast2400.c
> new file mode 100644
> index 0000000..74aca49
> --- /dev/null
> +++ b/hw/arm/ast2400.c
> @@ -0,0 +1,208 @@
> +/*
> + * ASPEED AST2400
> + *
> + * Andrew Jeffery <address@hidden>
> + * Jeremy Kerr <address@hidden>
> + *
> + * Copyright 2016 IBM Corp.
> + *
> + * This code is licensed under the GPL version 2 or later.  See
> + * the COPYING file in the top-level directory.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "exec/address-spaces.h"
> +#include "hw/arm/arm.h"
> +#include "hw/boards.h"
> +#include "hw/char/serial.h"
> +#include "hw/sysbus.h"
> +#include "hw/intc/aspeed_vic.h"
> +#include "hw/timer/aspeed_timer.h"
> +#include "target-arm/cpu.h"
> +#include "trace.h"
> +
> +#define AST2400_UART_5_BASE      0x00184000
> +#define AST2400_IOMEM_SIZE       0x00200000
> +#define AST2400_IOMEM_BASE       0x1E600000
> +#define AST2400_VIC_BASE         0x1E6C0000
> +#define AST2400_TIMER_BASE       0x1E782000
> +#define AST2400_SDRAM_BASE       0x40000000

> +
> +static void ast2400_soc_realize(DeviceState *dev, Error **errp)
> +{
> +    int i;
> +    AST2400SOCState *s = AST2400_SOC(dev);
> +    Error *err = NULL;
> +
> +    /* IO space */
> +    memory_region_init_io(&s->iomem, NULL, &ast2400_soc_io_ops, NULL,
> +            "ast2400.io", AST2400_IOMEM_SIZE);
> +    memory_region_add_subregion(get_system_memory(), AST2400_IOMEM_BASE,
> +            &s->iomem);

You need to add this memory region with a priority set so it is
lower priority than the VIC etc memory regions which it overlaps
(use memory_region_add_subregion_overlap()).

> +static void ast2400_soc_register_types(void)
> +{
> +    type_register_static(&ast2400_soc_type_info);
> +}
> +
> +type_init(ast2400_soc_register_types)

Your SoC device should be in its own source file, not sharing
one with the board file.

Otherwise I think this looks OK.

thanks
-- PMM