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[Qemu-devel] [PATCH v4 13/16] intel_iommu: add support for split irqchip
From: |
Peter Xu |
Subject: |
[Qemu-devel] [PATCH v4 13/16] intel_iommu: add support for split irqchip |
Date: |
Tue, 19 Apr 2016 16:38:39 +0800 |
In split irqchip mode, IOAPIC is working in user space, only update
kernel irq routes when entry changed. When IR is enabled, we directly
update the kernel with translated messages. It works just like a kernel
cache for the remapping entries.
Since KVM irqfd is using kernel gsi routes to deliver interrupts, as
long as we can support split irqchip, we will support irqfd as
well. Also, since kernel gsi routes will cache translated interrupts,
irqfd delivery will not suffer from any performance impact due to IR.
And, since we supported irqfd, vhost devices will be able to work
seamlessly with IR now. Logically this should contain both vhost-net and
vhost-user case.
Signed-off-by: Peter Xu <address@hidden>
---
hw/i386/intel_iommu.c | 5 +++++
include/hw/i386/intel_iommu.h | 2 ++
target-i386/kvm.c | 24 ++++++++++++++++++++++++
3 files changed, 31 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 58f6064..ca7e069 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2138,6 +2138,11 @@ do_not_translate:
return 0;
}
+int vtd_int_remap(void *iommu, MSIMessage *src, MSIMessage *dst)
+{
+ return vtd_interrupt_remap_msi(iommu, src, dst);
+}
+
static uint64_t vtd_mem_ir_read(void *opaque, hwaddr addr, unsigned size)
{
uint64_t data = 0;
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 5945670..5910e6f 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -25,6 +25,7 @@
#include "sysemu/dma.h"
#include "hw/i386/ioapic.h"
#include "hw/pci/msi.h"
+#include "hw/sysbus.h"
#define TYPE_INTEL_IOMMU_DEVICE "intel-iommu"
#define INTEL_IOMMU_DEVICE(obj) \
@@ -250,5 +251,6 @@ struct IntelIOMMUState {
VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn);
/* Get default IOMMU object */
IntelIOMMUState *vtd_iommu_get(void);
+int vtd_int_remap(void *iommu, MSIMessage *src, MSIMessage *dst);
#endif
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 799fdfa..7a996a2 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -36,6 +36,7 @@
#include "hw/i386/apic.h"
#include "hw/i386/apic_internal.h"
#include "hw/i386/apic-msidef.h"
+#include "hw/i386/intel_iommu.h"
#include "exec/ioport.h"
#include "standard-headers/asm-x86/hyperv.h"
@@ -3327,6 +3328,29 @@ int kvm_device_msix_deassign(KVMState *s, uint32_t
dev_id)
int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
uint64_t address, uint32_t data, PCIDevice *dev)
{
+ IntelIOMMUState *iommu = vtd_iommu_get();
+
+ if (iommu) {
+ int ret;
+ MSIMessage src, dst;
+
+ src.address = route->u.msi.address_hi;
+ src.address <<= VTD_MSI_ADDR_HI_SHIFT;
+ src.address |= route->u.msi.address_lo;
+ src.data = route->u.msi.data;
+
+ ret = vtd_int_remap(iommu, &src, &dst);
+ if (ret) {
+ error_report("VT-d Failed to remap interrupt for gsi %d.",
+ route->gsi);
+ return 1;
+ }
+
+ route->u.msi.address_hi = dst.address >> VTD_MSI_ADDR_HI_SHIFT;
+ route->u.msi.address_lo = dst.address & VTD_MSI_ADDR_LO_MASK;
+ route->u.msi.data = dst.data;
+ }
+
return 0;
}
--
2.4.3
- [Qemu-devel] [PATCH v4 03/16] intel_iommu: set IR bit for ECAP register, (continued)
- [Qemu-devel] [PATCH v4 03/16] intel_iommu: set IR bit for ECAP register, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 04/16] acpi: add DMAR scope definition for root IOAPIC, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 05/16] intel_iommu: define interrupt remap table addr register, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 06/16] intel_iommu: handle interrupt remap enable, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 08/16] intel_iommu: provide helper function vtd_get_iommu, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 07/16] intel_iommu: define several structs for IOMMU IR, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 09/16] intel_iommu: add IR translation faults defines, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 10/16] intel_iommu: Add support for PCI MSI remap, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 12/16] ioapic: introduce ioapic_entry_parse() helper, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 11/16] q35: ioapic: add support for emulated IOAPIC IR, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 13/16] intel_iommu: add support for split irqchip,
Peter Xu <=
- [Qemu-devel] [PATCH v4 14/16] q35: add "int-remap" flag to enable intr, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 16/16] ioapic: register VT-d IEC invalidate notifier, Peter Xu, 2016/04/19
- [Qemu-devel] [PATCH v4 15/16] intel_iommu: introduce IEC notifiers, Peter Xu, 2016/04/19
- Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for Intel IOMMU, Jan Kiszka, 2016/04/25
- Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for Intel IOMMU, Peter Xu, 2016/04/25
- Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for Intel IOMMU, Jan Kiszka, 2016/04/25
- Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for Intel IOMMU, Radim Krčmář, 2016/04/25
- Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for Intel IOMMU, Peter Xu, 2016/04/26
- Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for Intel IOMMU, Jan Kiszka, 2016/04/26
- Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for Intel IOMMU, Jan Kiszka, 2016/04/26