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Re: [Qemu-devel] [PATCH v5 7/9] target-mips: Add nan2008 flavor of <CEIL


From: Aleksandar Markovic
Subject: Re: [Qemu-devel] [PATCH v5 7/9] target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>
Date: Wed, 4 May 2016 11:28:20 +0000

> > @@ -8919,7 +8920,11 @@ static void gen_farith (DisasContext *ctx, enum 
> > fopcode op1,
> >              TCGv_i64 fp64 = tcg_temp_new_i64();
> >
> >              gen_load_fpr32(ctx, fp32, fs);
> > -            gen_helper_float_roundl_s(fp64, cpu_env, fp32);
> > +            if ((ctx->insn_flags & ISA_MIPS32R6) && (ctx->nan2008)) {

> Why testing the version of the architecture? This will generate wrong
> helper for P5600 which is R5 and IEEE 754-2008 compliant.

The code reflects the documentation.

I just want to bring to your attention following two versions of the paragraph 
detailing return value of ROUND.L.S for some special cases - one version from 
R6 documention, and the other from R5 documentation:

R6: ("MIPS® Architecture For Programmers Volume II-A: The MIPS64® Instruction 
Set Reference Manual", Revision 6.04, page 393)

"When the source value is Infinity, NaN, or rounds to an integer outside the 
range -2 63 to 2 63 -1, the result cannot be
represented correctly and an IEEE Invalid Operation condition exists. The 
Invalid Operation flag is set in the FCSR.
If the Invalid Operation Enable bit is set in the FCSR, no result is written to 
fd and an Invalid Operation exception is
taken immediately. Otherwise, a default result is written to fd. On cores with 
FCSR[NAN2008]=0, the default result is
2^63–1. On cores with FCSR[NAN2008]=1, the default result is:
  • 0 when the input value is NaN
  • 2^63 –1 when the input value is +infinity or rounds to a number larger than 
2^63 –1
  • -2^63 –1 when the input value is –infinity or rounds to a number smaller 
than -2^63 –1"

R5: ("MIPS® Architecture For Programmers Volume II-A: The MIPS64® Instruction 
Set Reference Manual", Revision 5.04, page 314)

"When the source value is Infinity, NaN, or rounds to an integer outside the 
range -2 63 to 2 63 -1, the result cannot be
represented correctly and an IEEE Invalid Operation condition exists. In this 
case the Invalid Operation flag is set in
the FCSR. If the Invalid Operation Enable bit is set in the FCSR, no result is 
written to fd and an Invalid Operation
exception is taken immediately. Otherwise, the default result, 2 63 – 1, is 
written to fd."

It looks to me that the documentation for P5600 does not specify any exception 
or diversion from architecture document in this area.

Please let me know what exception for P5600 I am missing from the documentation.

Thanks,
Aleksandar


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