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[Qemu-devel] [PATCH 2/4] intel_iommu: use deliver_msi APIC callback
From: |
Radim Krčmář |
Subject: |
[Qemu-devel] [PATCH 2/4] intel_iommu: use deliver_msi APIC callback |
Date: |
Fri, 6 May 2016 22:53:46 +0200 |
The memory-mapped interface cannot express x2APIC destinations that are
a result of remapping.
Signed-off-by: Radim Krčmář <address@hidden>
---
hw/i386/intel_iommu.c | 29 ++++++++++++++++++-----------
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index bee85e469477..d10064289551 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -26,6 +26,7 @@
#include "hw/pci/pci.h"
#include "hw/boards.h"
#include "hw/i386/x86-iommu.h"
+#include "hw/i386/apic_internal.h"
/*#define DEBUG_INTEL_IOMMU*/
#ifdef DEBUG_INTEL_IOMMU
@@ -268,24 +269,33 @@ static void vtd_update_iotlb(IntelIOMMUState *s, uint16_t
source_id,
g_hash_table_replace(s->iotlb, key, entry);
}
+static void apic_deliver_msi(MSIMessage *msi)
+{
+ /* Conjure apic-bound msi delivery out of thin air. */
+ X86CPU *cpu = X86_CPU(first_cpu);
+ APICCommonState *apic_state = APIC_COMMON(cpu->apic_state);
+ APICCommonClass *apic_class = APIC_COMMON_GET_CLASS(apic_state);
+
+ apic_class->deliver_msi(msi);
+}
+
/* Given the reg addr of both the message data and address, generate an
* interrupt via MSI.
*/
static void vtd_generate_interrupt(IntelIOMMUState *s, hwaddr mesg_addr_reg,
hwaddr mesg_data_reg)
{
- hwaddr addr;
- uint32_t data;
+ MSIMessage msi;
assert(mesg_data_reg < DMAR_REG_SIZE);
assert(mesg_addr_reg < DMAR_REG_SIZE);
- addr = vtd_get_long_raw(s, mesg_addr_reg);
- data = vtd_get_long_raw(s, mesg_data_reg);
+ msi.address = vtd_get_quad_raw(s, mesg_addr_reg);
+ msi.data = vtd_get_long_raw(s, mesg_data_reg);
VTD_DPRINTF(FLOG, "msi: addr 0x%"PRIx64 " data 0x%"PRIx32, addr, data);
- address_space_stl_le(&address_space_memory, addr, data,
- MEMTXATTRS_UNSPECIFIED, NULL);
+
+ apic_deliver_msi(&msi);
}
/* Generate a fault event to software via MSI if conditions are met.
@@ -2113,6 +2123,7 @@ static void vtd_generate_msi_message(VTDIrq *irq,
MSIMessage *msg_out)
msg.dest_mode = irq->dest_mode;
msg.redir_hint = irq->redir_hint;
msg.dest = irq->dest;
+ msg.__addr_hi = irq->dest & 0xffffff00;
msg.__addr_head = 0xfee;
/* Keep this from original MSI address bits */
msg.__not_used = irq->msi_addr_last_bits;
@@ -2262,11 +2273,7 @@ static MemTxResult vtd_mem_ir_write(void *opaque, hwaddr
addr,
VTD_DPRINTF(IR, "delivering MSI 0x%"PRIx64":0x%"PRIx32,
to.address, to.data);
- if (dma_memory_write(&address_space_memory, to.address,
- &to.data, size)) {
- VTD_DPRINTF(GENERAL, "error: fail to write 0x%"PRIx64
- " value 0x%"PRIx32, to.address, to.data);
- }
+ apic_deliver_msi(&to);
return MEMTX_OK;
}
--
2.8.2
[Qemu-devel] [PATCH 3/4] linux_headers: add MSI_X2APIC, Radim Krčmář, 2016/05/06
Re: [Qemu-devel] [RFC 0/4] APIC, IOMMU, KVM: add x2APIC interface, Peter Xu, 2016/05/09