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Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for


From: Paolo Bonzini
Subject: Re: [Qemu-devel] [PATCH v4 00/16] IOMMU: Enable interrupt remapping for Intel IOMMU
Date: Tue, 10 May 2016 10:58:02 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.1


On 10/05/2016 08:09, Peter Xu wrote:
> On Mon, May 09, 2016 at 01:58:48PM +0200, Paolo Bonzini wrote:
>> Is this enough too?
>>
>> diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
>> index 378e663..2443a35 100644
>> --- a/hw/intc/ioapic.c
>> +++ b/hw/intc/ioapic.c
>> @@ -72,6 +72,7 @@ static void ioapic_service(IOAPICCommonState *s)
>>                      (entry >> IOAPIC_LVT_DELIV_MODE_SHIFT) & IOAPIC_DM_MASK;
>>                  if (trig_mode == IOAPIC_TRIGGER_EDGE) {
>>                      s->irr &= ~mask;
>> +                    s->ioredtbl[i] &= ~IOAPIC_LVT_REMOTE_IRR;
>>                  } else {
>>                      coalesce = s->ioredtbl[i] & IOAPIC_LVT_REMOTE_IRR;
>>                      s->ioredtbl[i] |= IOAPIC_LVT_REMOTE_IRR;
> 
> I gave it a quick shot on this but still got the warning. :(
> 
> I _guess_ the problem is: the above change is in the "if" block of
> (s->irr & mask), when the kernel plays the trick of EOI, the irq
> should be pulled down already by the device (or say, irr bit is
> cleared). So it does not go into this "if" block.

No problem; feel free to send the other patch separately and I'll take
care of merging it.  Otherwise mst can merge it too.

Paolo



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