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[Qemu-devel] [PATCH 30/33] acpi: cpuhp: add cpu._OST handling
From: |
Igor Mammedov |
Subject: |
[Qemu-devel] [PATCH 30/33] acpi: cpuhp: add cpu._OST handling |
Date: |
Tue, 17 May 2016 16:43:22 +0200 |
Signed-off-by: Igor Mammedov <address@hidden>
---
hw/acpi/cpu.c | 83 +++++++++++++++++++++++++++++++++++++++++++++++++++
hw/acpi/ich9.c | 3 ++
hw/acpi/piix4.c | 3 ++
include/hw/acpi/cpu.h | 4 +++
qapi-schema.json | 3 +-
trace-events | 2 ++
6 files changed, 97 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c
index 6961c64..642e8e5 100644
--- a/hw/acpi/cpu.c
+++ b/hw/acpi/cpu.c
@@ -2,6 +2,7 @@
#include "hw/boards.h"
#include "hw/acpi/cpu.h"
#include "qapi/error.h"
+#include "qapi-event.h"
#include "trace.h"
#define ACPI_CPU_HOTPLUG_REG_LEN 12
@@ -12,9 +13,42 @@
enum {
CPHP_PXM_CMD = 0,
+ CPHP_OST_EVENT_CMD = 1,
+ CPHP_OST_STATUS_CMD = 2,
CPHP_CMD_MAX
};
+static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
+{
+ ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
+
+ info->slot_type = ACPI_SLOT_TYPE_CPU;
+ info->slot = g_strdup_printf("%d", idx);
+ info->source = cdev->ost_event;
+ info->status = cdev->ost_status;
+ if (cdev->cpu) {
+ DeviceState *dev = DEVICE(cdev->cpu);
+ if (dev->id) {
+ info->device = g_strdup(dev->id);
+ info->has_device = true;
+ }
+ }
+ return info;
+}
+
+void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
+{
+ int i;
+
+ for (i = 0; i < cpu_st->dev_count; i++) {
+ ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1);
+ elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]);
+ elem->next = NULL;
+ **list = elem;
+ *list = &elem->next;
+ }
+}
+
static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
{
uint64_t val = ~0;
@@ -57,6 +91,7 @@ static void cpu_hotplug_wr(void *opaque, hwaddr addr,
uint64_t data,
{
CPUHotplugState *cpu_st = opaque;
AcpiCpuStatus *cdev;
+ ACPIOSTInfo *info;
Error *local_err = NULL;
assert(cpu_st->dev_count);
@@ -95,6 +130,7 @@ static void cpu_hotplug_wr(void *opaque, hwaddr addr,
uint64_t data,
hotplug_ctrl = qdev_get_hotplug_handler(dev);
hotplug_handler_unplug(hotplug_ctrl, dev, &local_err);
if (local_err) {
+ /* TODO: send error QAPI event */
break;
}
}
@@ -105,6 +141,28 @@ static void cpu_hotplug_wr(void *opaque, hwaddr addr,
uint64_t data,
cpu_st->command = data;
}
break;
+ case ACPI_CPU_CMD_DATA_OFFSET_RW:
+ switch (cpu_st->command) {
+ case CPHP_OST_EVENT_CMD: {
+ cdev = &cpu_st->devs[cpu_st->selector];
+ cdev->ost_event = data;
+ trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
+ break;
+ }
+ case CPHP_OST_STATUS_CMD: {
+ cdev = &cpu_st->devs[cpu_st->selector];
+ cdev->ost_status = data;
+ info = acpi_cpu_device_status(cpu_st->selector, cdev);
+ qapi_event_send_acpi_device_ost(info, &error_abort);
+ qapi_free_ACPIOSTInfo(info);
+ trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
+ cdev->ost_status);
+ break;
+ }
+ default:
+ break;
+ }
+ break;
default:
break;
}
@@ -214,6 +272,8 @@ static const VMStateDescription vmstate_cpuhp_sts = {
VMSTATE_BOOL(is_enabled, AcpiCpuStatus),
VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
VMSTATE_BOOL(is_removing, AcpiCpuStatus),
+ VMSTATE_UINT32(ost_event, AcpiCpuStatus),
+ VMSTATE_UINT32(ost_status, AcpiCpuStatus),
VMSTATE_END_OF_LIST()
}
};
@@ -240,6 +300,7 @@ const VMStateDescription vmstate_cpu_hotplug = {
#define CPU_EJECT_METHOD "CEJ0"
#define CPU_NOTIFY_METHOD "CTFY"
#define CPU_PXM_METHOD "CPXM"
+#define CPU_OST_METHOD "COST"
#define CPU_ENABLED "CPEN"
#define CPU_SELECTOR "CSEL"
@@ -439,6 +500,21 @@ void build_cpus_aml(Aml *table, MachineState *machine,
bool acpi1_compat,
}
aml_append(cpus_dev, method);
}
+ method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
+ {
+ Aml *uid = aml_arg(0);
+ Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
+ Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
+
+ aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
+ aml_append(method, aml_store(uid, cpu_selector));
+ aml_append(method, aml_store(ev_cmd, cpu_cmd));
+ aml_append(method, aml_store(aml_arg(1), cpu_data));
+ aml_append(method, aml_store(st_cmd, cpu_cmd));
+ aml_append(method, aml_store(aml_arg(2), cpu_data));
+ aml_append(method, aml_release(ctrl_lock));
+ }
+ aml_append(cpus_dev, method);
/* build Processor object for each processor */
for (i = 0; i < arch_ids->len; i++) {
@@ -485,6 +561,13 @@ void build_cpus_aml(Aml *table, MachineState *machine,
bool acpi1_compat,
aml_return(aml_call1(CPU_PXM_METHOD, uid)));
aml_append(dev, method);
}
+
+ method = aml_method("_OST", 3, AML_SERIALIZED);
+ aml_append(method,
+ aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
+ aml_arg(1), aml_arg(2))
+ );
+ aml_append(dev, method);
aml_append(cpus_dev, dev);
}
}
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index b0285b9..3d65519 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -537,4 +537,7 @@ void ich9_pm_ospm_status(AcpiDeviceIf *adev,
ACPIOSTInfoList ***list)
ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
+ if (!s->pm.cpu_hotplug_legacy) {
+ acpi_cpu_ospm_status(&s->pm.cpuhp.state, list);
+ }
}
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index ee83d10..59f5c2a 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -629,6 +629,9 @@ static void piix4_ospm_status(AcpiDeviceIf *adev,
ACPIOSTInfoList ***list)
PIIX4PMState *s = PIIX4_PM(adev);
acpi_memory_ospm_status(&s->acpi_memory_hotplug, list);
+ if (!s->cpu_hotplug_legacy) {
+ acpi_cpu_ospm_status(&s->cpuhp.state, list);
+ }
}
static void piix4_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
diff --git a/include/hw/acpi/cpu.h b/include/hw/acpi/cpu.h
index f1f6165..ccbeccb 100644
--- a/include/hw/acpi/cpu.h
+++ b/include/hw/acpi/cpu.h
@@ -23,6 +23,8 @@ typedef struct AcpiCpuStatus {
bool is_enabled;
bool is_inserting;
bool is_removing;
+ uint32_t ost_event;
+ uint32_t ost_status;
} AcpiCpuStatus;
typedef struct CPUHotplugState {
@@ -50,6 +52,8 @@ void build_cpus_aml(Aml *table, MachineState *machine, bool
apci1_compat,
const char *res_root, const char *event_handler_method,
hwaddr io_base);
+void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list);
+
extern const VMStateDescription vmstate_cpu_hotplug;
#define VMSTATE_CPU_HOTPLUG(cpuhp, state) \
VMSTATE_STRUCT(cpuhp, state, 1, \
diff --git a/qapi-schema.json b/qapi-schema.json
index 54634c4..54ce851 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -4018,8 +4018,9 @@
## @ACPISlotType
#
# @DIMM: memory slot
+# @CPU: logical CPU slot
#
-{ 'enum': 'ACPISlotType', 'data': [ 'DIMM' ] }
+{ 'enum': 'ACPISlotType', 'data': [ 'DIMM', 'CPU' ] }
## @ACPIOSTInfo
#
diff --git a/trace-events b/trace-events
index b141d49..4716b96 100644
--- a/trace-events
+++ b/trace-events
@@ -1919,3 +1919,5 @@ cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx:
0x%"PRIx32
cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) "idx[0x%"PRIx32"] cmd:
0x%"PRIx8
cpuhp_acpi_ejecting_invalid_cpu(uint32_t idx) "0x%"PRIx32
cpuhp_acpi_ejecting_cpu(uint32_t idx) "0x%"PRIx32
+cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST
EVENT: 0x%"PRIx32
+cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST
STATUS: 0x%"PRIx32
--
1.8.3.1
- Re: [Qemu-devel] [PATCH 20/33] pc: q35: initialize new CPU hotplug hw, (continued)
- [Qemu-devel] [PATCH 31/33] tests: acpi: update expected tables with new cpu-hotplug methods enabled by default, Igor Mammedov, 2016/05/17
- [Qemu-devel] [PATCH 19/33] pc: piix4/ich9: add 'cpu-hotplug-legacy' property, Igor Mammedov, 2016/05/17
- [Qemu-devel] [PATCH 23/33] acpi: add CPU devices AML to DSDT, Igor Mammedov, 2016/05/17
- [Qemu-devel] [PATCH 32/33] tests: acpi: add CPU hotplug testcase, Igor Mammedov, 2016/05/17
- [Qemu-devel] [PATCH 29/33] acpi: cpuhp: provide cpu._PXM method if running in numa mode, Igor Mammedov, 2016/05/17
- [Qemu-devel] [PATCH 33/33] tests: acpi: add DSDT/MADT expected tables for cpu-hotplug case, Igor Mammedov, 2016/05/17
- [Qemu-devel] [PATCH 27/33] pc: numa: replace node_cpu indexing by apic_id with possible_cpus index, Igor Mammedov, 2016/05/17
- [Qemu-devel] [PATCH 28/33] pc: set X86CPU.node property if QEMU starts with numa enabled, Igor Mammedov, 2016/05/17
- [Qemu-devel] [PATCH 30/33] acpi: cpuhp: add cpu._OST handling,
Igor Mammedov <=
[Qemu-devel] [PATCH 26/33] target-i386: add X86CPU.node property, Igor Mammedov, 2016/05/17